• RFIC Design Engineer (Starshield)

    SpaceX (Hawthorne, CA)
    RFIC Design Engineer (Starshield) Hawthorne, CA Apply SpaceX was founded under the belief that a future where humanity is out exploring the stars is ... possible, with the ultimate goal of enabling human life on Mars. RFIC DESIGN ENGINEER (STARSHIELD) Starshield leverages SpaceX's Starlink technology and launch… more
    SpaceX (07/24/25)
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  • Principal FPGA / Rtl Design Engineer

    Silvus Technologies (Irvine, CA)
    …career._ THE OPPORTUNITY Silvus is seeking a full-time **_Principal FPGA / RTL Design Engineer_** who will report to the _Senior Engineering Director for Irvine_ and ... the research and development process from concept to field deployment. FPGA Design Engineers are responsible for the efficient implementation of novel signal… more
    Silvus Technologies (10/04/25)
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  • Principal FPGA / Rtl Design Engineer

    Silvus Technologies (Irvine, CA)
    …fulfilling career._ THE OPPORTUNITY Silvus is seeking a full-time Principal FPGA / RTL Design Engineer who will report to the Senior Engineering Director for ... challenging real-world communication needs. The Principal FPGA / RTL Design Engineer position will be based at...* Experience with wireless communication systems on FPGA or ASIC designs. The pay range is NOT a guarantee,… more
    Silvus Technologies (10/03/25)
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  • Senior FPGA / Rtl Design Engineer

    Silvus Technologies (Irvine, CA)
    …fulfilling career._ THE OPPORTUNITY Silvus is seeking a **_Senior FPGA / RTL Design Engineer_** reporting to the _Director of FPGA Engineering_ on the FPGA ... and development process from concept to field deployment. FPGA Design Engineers are responsible for the efficient implementation of...skill. + Experience with communication systems on FPGA or ASIC designs. **COMPENSATION** _The pay range is NOT a… more
    Silvus Technologies (10/04/25)
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  • Principal Design Engineer

    Microsoft Corporation (Mountain View, CA)
    …engineers to help achieve that mission. We are looking for a **Principal Design Engineer ** to work in the dynamic Microsoft Artificial Intelligence System ... Architects + Analog mixed-signal designers + Verification engineers + Physical design and DFT teams + Other...trade-offs, post-silicon debug, and successful delivery of IP and ASIC /SoC designs. + 7+ years of experience in high-speed… more
    Microsoft Corporation (09/30/25)
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  • Senior E/E & Semiconductor Engineer

    Capgemini (San Jose, CA)
    …data structures, and algorithms. The ideal candidate will have experience in ASIC design and development within Linux-based environments. Proficiency in version ... structures and algorithms to solve complex problems. + Support ASIC design and verification processes. + Develop...digital and software to support the convergence of the physical and digital worlds. Coupled with the capabilities of… more
    Capgemini (09/20/25)
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  • Senior Analog/mixed-signal IC Design

    Cisco (San Jose, CA)
    Senior Analog/mixed-signal IC Design Engineer - Acacia Apply (https://jobs.cisco.com/jobs/Login?projectId=1443040) + Location:San Jose, California, US + ... accuracy, analog designs for optical communications products. We optimize design that will integrate into the ASIC ....power how humans and technology work together across the physical and digital worlds. These solutions provide customers with… more
    Cisco (08/23/25)
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  • Package Design Engineer

    Broadcom (San Jose, CA)
    …you apply.** **Job Description:** Broadcom is seeking an experienced IC package- design engineer for complex flip-chip-BGA packages for industry-leading ASICs ... design team, through process development/improvement, automation, documentation, etc. + Physical design (layout) is a foundational responsibility in this… more
    Broadcom (08/19/25)
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  • Staff Hardware Systems Design

    Google (Sunnyvale, CA)
    Staff Hardware Systems Design Engineer , Board and Systems _corporate_fare_ Google _place_ Sunnyvale, CA, USA **Advanced** Experience owning outcomes and decision ... domain. _info_outline_ XThis is a specialized role which requires physical interaction with hardware equipment in a simulated data...6 years of experience working in a hardware systems design , or 5 years of experience with an advanced… more
    Google (09/30/25)
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  • Senior Mask Design Engineer

    NVIDIA (Santa Clara, CA)
    …is our life's work, to amplify human creativity and intelligence. Are you a Mask Layout Design Engineer ? If yes, We would love to hear from you! We are looking ... for a Senior Mask Layout Design Engineer , someone who is excited to...mixed-signal circuit designs. What you'll be doing: + Performing physical layout for mixed-signal functions like PLL's, high speed… more
    NVIDIA (08/28/25)
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