- Meta (Sacramento, CA)
- …at maximum reliability, scalability, and efficiency. **Required Skills:** Network Production Engineer , Design Responsibilities: 1. Design network topologies ... C/C++ for developing automation software or tooling 14. Working knowledge of physical infrastructure design including structured cabling and fiber-optic cabling… more
- NVIDIA (Santa Clara, CA)
- …We would love to hear from you! We are looking for a Senior Mask Layout Design Engineer , someone who is excited to join a growing and dynamic group of ... high-speed mixed-signal circuit designs. What you'll be doing: + Performing physical layout for mixed-signal functions like PLL's, high speed SerDes, Analog… more
- Cisco (San Jose, CA)
- …Service Provider SI team is seeking a Senior Technical Lead, Signal/Power Integrity Engineer for the design and analysis of high-speed interconnects and power ... structures. + Perform pre- and post-route signal integrity analysis of both PCB and ASIC package designs. + Write signal integrity design guidelines, test plans,… more
- Cisco (San Jose, CA)
- …the Team** The Cisco Service Provider SI team is seeking a Signal Integrity Engineer for the design and analysis of high-speed components, interfaces, and power ... Signal Integrity Engineer Apply (https://jobs.cisco.com/jobs/Login?projectId=1450913) + Location:San Jose, California, US...Switch products, be a part of the definition and design of current and next generation ASIC ,… more
- NVIDIA (Santa Clara, CA)
- …aging, self-heating, thermal impact, IR drop etc. + Collaborate with technology leads, VLSI physical design , and timing engineers to define and deploy the most ... intelligence. We are seeking an innovative Senior Timing Methodology Engineer to help drive sign-off strategies for the world's...Electrical or Computer Engineering with 3 years' experience in ASIC Design and Timing. + Good understanding… more
- SanDisk (Milpitas, CA)
- …requirements to various functions of Memory teams to meet systems specs. + Define ASIC requirements for upcoming new NAND Flash based chips and design systems ... years of working experience in NAND flash based systems or relevant systems design PREFERRED: + Knowledge of programming in high-level languages (eg C, C++, Python)… more
- Broadcom (San Jose, CA)
- …debug and yield improvement to meet the product test metrics. It involves working with the Physical Design & STA team for DFT mode timing closure. The role could ... analysis, diagnostics & yield improvement efforts + Interfacing with the customer, physical design and test engineering/manufacturing teams located globally +… more
- NVIDIA (Santa Clara, CA)
- …member of this team, you will collaborate with Architects, Performance Engineers, Software Engineers, ASIC Design Engineers, and Physical Design teams to ... now looking for a Senior Power Architecture and Optimization Engineer ! NVIDIA prides ourselves in having energy efficient products....power design . + Familiarity with Verilog and ASIC design principles, including knowledge of Power… more
- Google (Sunnyvale, CA)
- …related field, or equivalent practical experience. + 4 years of experience working in an ASIC or FPGA design technical environment, or 3 years of experience with ... FPGA Engineer , Platforms, Hardware _corporate_fare_ Google _place_ Sunnyvale, CA,..._info_outline_ X This is a specialized role which requires physical interaction with hardware equipment in a simulated data… more
- Microsoft Corporation (Santa Clara, CA)
- …for passionate, high-energy engineers to help achieve that mission. As a Senior Silicon Engineer - ASIC verification in the Data Processing Unit team you will ... your career. We are looking for a **Senior Silicon Engineer ** to Join our team! **Responsibilities** + Lead key...+ Lead key components of functional validation of complex ASIC SOC using UVM/C test bench + Perform pre-silicon… more
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