• Sr.Test Development Engineer

    Cisco (San Jose, CA)
    …number of applications are received.** **Meet The Team** You will collaborate with ASIC design teams in the Central Hardware Group, peer Test Engineers ... Sr.Test Development Engineer Apply (https://jobs.cisco.com/jobs/Login?projectId=1448472) + Location:San Jose, California, US...ATE test bring-up. You will partner with the Cisco ASIC team to bring up tests, characterize units, and… more
    Cisco (09/26/25)
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  • Emulation Engineer II

    Microsoft Corporation (Santa Clara, CA)
    …software and hardware expertise to create a highly programmable and high-performance ASIC with the capability to efficiently handle large data streams. Thanks to ... its integrated design , this solution empowers teams to operate with increased...performance compared to CPU-based alternatives **Responsibilities** As an Emulation Engineer II in the Data Processing Unit team you… more
    Microsoft Corporation (09/23/25)
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  • Senior Security Firmware Engineer

    SanDisk (Irvine, CA)
    …the Firmware on SoC platforms, as well as bringing up of FPGA and ASIC . + Contribute to the Security Development Lifecycle of the Firmware by supporting its ... development at different stages, including design , threat analysis, implementation, validation, vulnerability testing, certification, and audit. **Qualifications**… more
    SanDisk (09/18/25)
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  • Principal Product Engineer

    Cadence Design Systems, Inc. (San Jose, CA)
    …a highly motivated, optimistic, and energetic engineer with a good appreciation of ASIC design methodologies from RTL to GDSII with a strong history of ... technology. This opportunity is for an engagement focused Product Engineer (PE) in the Digital and Signoff Group (DSG)...EDA with an emphasis on Cadence tools of Synthesis, Physical Design & timing closure at 20nm… more
    Cadence Design Systems, Inc. (09/09/25)
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  • Digital FPGA Engineer Level 3 (AHT)

    Northrop Grumman (Los Angeles, CA)
    …quickly and continuously drive innovation. The selected individual will work on FPGA and ASIC Design across the full product life cycle process. In this ... making history. **Northrop Grumman's Defense Systems** is currently seeking a **Digital FPGA Engineer ** **Level 3** with the desire to learn new technologies to join… more
    Northrop Grumman (10/02/25)
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  • Digital FPGA Engineer Level 4 (AHT)

    Northrop Grumman (Los Angeles, CA)
    …quickly and continuously drive innovation. The selected individual will work on FPGA and ASIC Design across the full product life cycle process. In this ... making history. **Northrop Grumman's Defense Systems** is currently seeking a **Digital FPGA Engineer ** **Level 4** with the desire to learn new technologies to join… more
    Northrop Grumman (09/07/25)
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  • Staff Signal Integrity Engineer , Platforms

    Google (Sunnyvale, CA)
    …and understanding of SERDES capabilities. **About the job** As a Staff Signal Integrity Engineer , you will design and build the systems that are important to ... Staff Signal Integrity Engineer , Platforms _corporate_fare_ Google _place_ Sunnyvale, CA, USA..._info_outline_ X This is a specialized role which requires physical interaction with hardware equipment in a simulated data… more
    Google (09/28/25)
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  • Senior DFx/RTL Engineer

    Cisco (San Jose, CA)
    …focus on Design -for-Test. You will work with Front-end RTL teams, backend physical design teams to understand chip architecture and drive DFT requirements ... Senior DFx/RTL Engineer Apply (https://jobs.cisco.com/jobs/Login?projectId=1447271) + Location:San Jose, California, US...participate in the creation of Innovative Hardware DFT & physical design aspects for new silicon device… more
    Cisco (10/04/25)
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  • Senior Field Application Engineer

    Global Foundries (Santa Clara, CA)
    …is a leading full-service semiconductor foundry providing a unique combination of design , development, and fabrication services to some of the world's most inspired ... Summary of Role: GlobalFoundries seeks an experienced Principal Field Applications Engineer . You will have responsibility for providing on-going support to… more
    Global Foundries (07/24/25)
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  • Lead Application Engineer

    Cadence Design Systems, Inc. (San Jose, CA)
    …machine learning etc. This role is ideal for someone with several years of hands on ASIC /IC design experience who is looking for a new challenge in an absorbing ... of technology. Cadence is a pivotal leader in electronic design , building upon more than 30 years of computational...on the world of technology. Job Title: Lead Application Engineer Location: Tampere, Finland Reports to: AE Director Job… more
    Cadence Design Systems, Inc. (07/18/25)
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