- Cisco (San Jose, CA)
- …as per need for verification robustness. * Guide and mentor a team of physical design engineers on project-level backend implementation and partner closely with ... and automate workflows. * Experience working with one or more of the following physical design tools, such as Cadence, Innovus, Synopsys IC Compiler, or Fusion… more
- Meta (San Diego, CA)
- …from transistors, through architecture, firmware, and algorithms.We are growing our Machine Learning ASIC Design and uArchitecture team within RL and are seeking ... 5. Work cross-functionally with adjacent chip-level teams such as Verification, Physical Design , and Design -for-Test **Minimum Qualifications:** Minimum… more
- Google (Sunnyvale, CA)
- …or a related field, or equivalent practical experience. + 10 years of experience in ASIC physical design and methodologies in advanced process nodes. + ... stack, including timing, PDV, EMIR, package concerns, and power. + Experience with custom physical design , which may include custom datapath design , standard… more
- Google (Sunnyvale, CA)
- …the domain of static timing analysis. + Experience leading one or more aspects of physical design or physical design flow/methodology, to successful ... within AI/ML-driven systems. In this role, you will work on the physical implementation of Application-specific integrated circuits ( ASIC ) using advanced… more
- quadric.io, Inc (Burlingame, CA)
- …Happiness What We Expect: Initiative, Collaboration, Completion Role As a member of our physical design methodology team you will be tasked with developing ... physical design methodologies and automation scripts for...Electrical Engineering with a minimum of eight years of CPU/GPU/ ASIC implementation + Proficiency in TCL scripting + Proficiency… more
- Qualcomm (Folsom, CA)
- …define, develop and drive CPU timing closure for Oryon CPU Cores. As a CPU Physical Design Timing Engineer, you will work with microarchitecture and RTL ... scripts within STA/PD tools for methodology development. + Good Technical writing and Communication skills, should be willing to...Layout Parasitic Extraction, feed through handling, + Knowledge of ASIC back-end design flows and methods and… more
- Meta (Sunnyvale, CA)
- …quality RTL in collaboration with Digital Verification (DV) 3. Support back end physical design (PD) through STA and SDCs 4. Drive IP/sub-system ... integration and ASIC architecture 10. Skilled in micro-architecture, RTL coding, design verification and SoC Integration of complex IPs 11. Experience in CDC,… more
- Qualcomm (San Diego, CA)
- …bump and ball patterns and decoupling capacitance scheme. + Work with system designers, design verification and physical design teams to define, implement, ... Bachelor's degree in Science, Engineering, or related field and 8+ years of ASIC design , verification, validation, integration, or related work experience. OR… more
- Capgemini (CA)
- …including strategic account development in complex semiconductor services sales, particularly in ASIC design services and sales pursuit management with at least ... relationships with foundries, EDA companies, and IP providers. + Background in ASIC Design or Semiconductor Technology R&D is advantageous, ideally with… more
- Celestica (San Diego, CA)
- …technology disruption, they trust Celestica to deliver the most advanced design , engineering and manufacturing expertise for their highly sophisticated and complex ... services. The TPM - GCBU is primarily responsible to be the customer facing technical program manager for projects and new program launches in the business unit.… more
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