• Principal DSP Engineer - Coherent Optical…

    Cisco (San Jose, CA)
    …from the DSP and ASIC teams is key to optimizing performance and power efficiency . You'll contribute to system design, develop architectures, and support ... Principal DSP Engineer - Coherent Optical Transmission Systems - Acacia Apply...ASIC design and verification. Work closely with colleagues across various… more
    Cisco (08/23/25)
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  • FPGA Engineer , Platforms, Hardware

    Google (Sunnyvale, CA)
    FPGA Engineer , Platforms, Hardware + _link_ Copy link + _email_ Email a friend _corporate_fare_ Google _place_ Sunnyvale, CA, USA **Mid** Experience driving ... in a simulated data center environment, utilizing Google labs, power , and safety equipment. Regular development and processing of...experience. + 4 years of experience working in an ASIC or FPGA design technical environment, or 3 years… more
    Google (09/28/25)
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  • Senior Architecture Energy Modeling…

    NVIDIA (Santa Clara, CA)
    … Modeling, Methodology and Analysis Team, you will collaborate with Architects, ASIC Design Engineers, Low Power Engineers, Performance Engineers, Software ... are now looking for an Sr. Architecture Energy Modeling Engineer ! At NVIDIA, we pride ourselves in having energy-efficient...We believe that continuing to maintain our products' energy efficiency compared to the competition is key to our… more
    NVIDIA (09/05/25)
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  • Physical Design Flow and Methodology…

    Google (Sunnyvale, CA)
    Physical Design Flow and Methodology Engineer + _link_ Copy link + _email_ Email a friend _corporate_fare_ Google _place_ Sunnyvale, CA, USA **Mid** Experience ... part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products… more
    Google (09/28/25)
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  • Hardware Engineer | Hardware Design…

    Cisco (Milpitas, CA)
    …the hardware for the 8000 series routers to deliver the best quality, best power efficiency using cutting edge series technology at the highest bit rates ... Hardware Engineer | Hardware Design | Routers Apply (https://jobs.cisco.com/jobs/Login?projectId=1450983)...Cadence/Allegro to capture schematics + Bring up hardware with ASIC teams + Debug issues the lab using analyzers,… more
    Cisco (10/01/25)
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  • Senior Package Layout Engineer - Hardware

    NVIDIA (Santa Clara, CA)
    NVIDIA's GPUs and SOCs are the world leaders in power , performance and efficiency . We are continually innovating to deliver new and creative, unusual solutions ... we are now seeking a hard-working Senior Package Layout Engineer who is committed to making a difference in...Layout team, you will collaborate to implement high speed/density ASIC packages. + Perform substrate breakout patterns for … more
    NVIDIA (09/17/25)
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  • Software Engineer - Forwarding Plane

    Cisco (Milpitas, CA)
    Software Engineer - Forwarding Plane Apply (https://jobs.cisco.com/jobs/Login?projectId=1439805) + Location:Milpitas, California, US + Area of InterestEngineer - ... System Engineering (DSE) group is at the forefront of developing products that power the largest networks in the world. The networking industry is going through… more
    Cisco (08/02/25)
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  • Sr. HW Systems Engineer , Project Kuiper

    Amazon (San Diego, CA)
    …communities around the world. Come work at Amazon! As the Gateway Modem Systems Engineer , you will take the lead inside the RF Hardware team to define, design, ... that can be realized for flight hardware. In this role you will: * Coordinate with ASIC , antenna, comm systems, & software teams to help define and drive a state of… more
    Amazon (07/11/25)
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  • Hardware Engineer , Platforms, University…

    Google (Sunnyvale, CA)
    …will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency , and integration. As a Hardware Engineer in the board ... Hardware Engineer , Platforms, University Graduate + _link_ Copy link...and PCB layout, and layout practices for signal integrity, power delivery, and manufacturability. + Experience with Electrical Engineering… more
    Google (09/26/25)
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  • Package Design Engineer

    Broadcom (San Jose, CA)
    … ASIC package designs, including aspects of signal integrity, power integrity, manufacturability, reliability, and thermal, in partnership with our experienced ... **Job Description:** Broadcom is seeking an experienced IC package-design engineer for complex flip-chip-BGA packages for industry-leading ASICs with high-speed… more
    Broadcom (08/19/25)
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