- Cisco (San Jose, CA)
- Senior DFx/ RTL Engineer Apply (https://jobs.cisco.com/jobs/Login?projectId=1447271) + Location:San Jose, California, US + Area of InterestEngineer - Hardware + ... be in the Silicon One development organization as an ASIC Implementation Technical Lead in San Jose, CA with...in San Jose, CA with a primary focus on Design -for-Test. You will work with Front-end RTL … more
- Meta (Sunnyvale, CA)
- …as machine learning, video transcoding and network acceleration. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration ... **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure...and data path IPs OR Experience in SoC Micro-architecture, Design and Integration 7. RTL development using… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is seeking an outstanding Senior ASIC Design Engineer to ...Systems design . + A deep understanding of ASIC design flow including RTL ... be doing: + As a key member of our design team, you will be responsible for the micro-architecture...want to hear from you. Come, join our GPU ASIC team and help build the real-time, cost-effective computing… more
- Meta (Sunnyvale, CA)
- …world-class complex SoC and IP for data center applications. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration 2. ... **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure...Micro-architecture development 3. RTL development using Verilog, System Verilog and HLS 4.… more
- Meta (Sunnyvale, CA)
- …PLL, etc) 13. Knowledge of front-end ASIC flows 14. Experience with RTL design using SystemVerilog or other Hardware Description Language 15. Experience with ... Perform RTL Lint and work with the Designers to create waivers 4. Perform RTL Design for Testability Analysis and improve the Design for Testability… more
- Cisco (San Jose, CA)
- ASIC Design Engineer Apply (https://jobs.cisco.com/jobs/Login?projectId=1441220) + Location:San Jose, California, US + Area of InterestEngineer - Hardware + ... and writing micro-architecture and implementation specifications. + Implement Verilog RTL to meet timing and performance requirements. + Help...in Electrical or Computer engineering and 7+ years of ASIC Design experience, or a Master's degree… more
- NVIDIA (Santa Clara, CA)
- NVIDIA Networking Clock design team is looking for experienced top notch ASIC design engineer to work on next generation of NVIDIA Networking chips. ... design next generation clock topologies and modules. + ASIC Clock scheme definition. + Improve Power, Performance, and...+ At least 6+ years of work experience in RTL design , Gate-Level and Circuit design… more
- SpaceX (Sunnyvale, CA)
- …analyzing results + Experience with scripting languages, eg Python for automation + RTL design , chip bring-up, and post-silicon validation experience + Ability ... FPGA/ ASIC Verification Engineer (Silicon Engineering) Sunnyvale,...will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design , validation, product engineering, ASIC implementation). In… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is looking for an ASIC Design Engineer to join our Global Circuits Team! In this position, you'll make a real impact in a dynamic, technology-focused ... position, you will have the opportunity to develop scalable RTL designs, execute synthesis and perform timing analysis using...from the crowd: + Experience with all stages of ASIC design flow including front end … more
- Cisco (San Jose, CA)
- ASIC Design Technical Leader - Design &...multiple timing modes. + Option to also do block level RTL design or block or top-level IP integration. + ... provide. You will work with exceptional talent with vast ASIC design and development expertise. With Cisco...block level SDCs and clocking diagrams and mentor other RTL design owners on SDC development. +… more