- Meta (Sunnyvale, CA)
- …as machine learning, video transcoding and network acceleration. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration ... **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure...and data path IPs OR Experience in SoC Micro-architecture, Design and Integration 7. RTL development using… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is seeking an outstanding Senior ASIC Design Engineer to ...Systems design . + A deep understanding of ASIC design flow including RTL ... be doing: + As a key member of our design team, you will be responsible for the micro-architecture...want to hear from you. Come, join our GPU ASIC team and help build the real-time, cost-effective computing… more
- Meta (Sunnyvale, CA)
- …world-class complex SoC and IP for data center applications. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration 2. ... **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure...Micro-architecture development 3. RTL development using Verilog, System Verilog and HLS 4.… more
- Cisco (San Jose, CA)
- Senior DFx/ RTL Engineer Apply (https://jobs.cisco.com/jobs/Login?projectId=1447271) + Location:San Jose, California, US + Area of InterestEngineer - Hardware + ... be in the Silicon One development organization as an ASIC Implementation Technical Lead in San Jose, CA with...in San Jose, CA with a primary focus on Design -for-Test. You will work with Front-end RTL … more
- NVIDIA (Santa Clara, CA)
- NVIDIA is looking for an ASIC Design Engineer to join our Memory Subsystem Team! As an ASIC Design engineer at NVIDIA, you'll join a group of ... the opportunity to be responsible for the micro-architecture and design including RTL design , synthesis,...to see: + BS in Electrical Engineering or Computer Engineer or related degree required (or equivalent experience), advanced… more
- Cisco (San Jose, CA)
- ASIC Design Technical Leader - Design &...multiple timing modes. + Option to also do block level RTL design or block or top-level IP integration. + ... provide. You will work with exceptional talent with vast ASIC design and development expertise. With Cisco...block level SDCs and clocking diagrams and mentor other RTL design owners on SDC development. +… more
- Meta (Sunnyvale, CA)
- …click "Apply to Job" online on this web page. **Required Skills:** ASIC Engineer , Implementation Responsibilities: 1. Run logic/physical synthesis using advanced ... and Power. 2. Debug timing/area/congestion issues and resolve w/ RTL & physical designers. 3. Perform power estimation at...domain crossing checks. 9. Understand reset-architecture and work with design & FW teams to develop reset groups and… more
- SpaceX (Sunnyvale, CA)
- …in scan insertion or DFT setup PREFERRED SKILLS AND EXPERIENCE: + Understanding of ASIC design flow, methodologies, physical design , and verification + ... ASIC /SOC DFT Engineer (Silicon Engineering) Sunnyvale,...of the Starlink network. RESPONSIBILITIES: + Responsible for evaluating design readiness for scan insertion through RTL … more
- NVIDIA (Santa Clara, CA)
- …and intelligence. What You'll Be doing: + As a Front-End ASIC Synthesis Engineer , you will own RTL synthesis and gate level optimization tasks + ... generation CMOS technology. We are looking for a Senior ASIC Synthesis Engineer to join our dynamic... synthesis and integration. + Deep understanding of Verilog RTL design and digital design … more
- Meta (Sunnyvale, CA)
- **Summary:** As a Networking ASIC Engineer on the Infrastructure Silicon team at Meta, you will play a key role in shaping the networking architecture for ... with cross-functional teams working on data center networking architecture, network system design , micro-architecture, RTL design , Design Verification,… more
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