- Meta (Sunnyvale, CA)
- …apply, click "Apply to Job" online on this web page. **Required Skills:** ASIC Design Engineer Responsibilities: 1. Responsible for micro-architecture ... development. 2. Perform RTL development using Verilog, System Verilog and/or HLS. 3....debugging. 5. Collaborate with implementation team to close the design on timing and power. **Minimum Qualifications:** Minimum Qualifications:… more
- Meta (Sunnyvale, CA)
- …click "Apply to Job" online on this web page. **Required Skills:** ASIC Engineer , Implementation Responsibilities: 1. Run logic/physical synthesis using advanced ... and Power. 2. Debug timing/area/congestion issues and resolve w/ RTL & physical designers. 3. Perform power estimation at...domain crossing checks. 9. Understand reset-architecture and work with design & FW teams to develop reset groups and… more
- RTX Corporation (El Segundo, CA)
- …and ASIC / FPGA digital architecture + Implement ASIC / FPGA digital design using RTL + Support verification and system integration of ASIC / FPGA ... security clearance is required prior to start date + RTL coding and simulation in VHDL, Verilog, or SystemVerilog...digital lab equipment **Qualifications We Prefer:** + Experience using ASIC and/or FPGA design tools (eg Modelsim,… more
- SpaceX (Sunnyvale, CA)
- …in scan insertion or DFT setup PREFERRED SKILLS AND EXPERIENCE: + Understanding of ASIC design flow, methodologies, physical design , and verification + ... ASIC /SOC DFT Engineer (Silicon Engineering) Sunnyvale,...of the Starlink network. RESPONSIBILITIES: + Responsible for evaluating design readiness for scan insertion through RTL … more
- Meta (Menlo Park, CA)
- **Summary:** As a Networking ASIC Engineer on the Infrastructure Silicon team at Meta, you will play a key role in shaping the networking architecture for ... with cross-functional teams working on data center networking architecture, network system design , micro-architecture, RTL design , Design Verification,… more
- Cisco (San Jose, CA)
- …of a smaller, startup-style team. You'll collaborate with exceptional talent with deep ASIC design and development expertise. As part of a systems company, ... first customer shipments. **Your Impact** You are a diligent Design /SDC Engineer with strong analytical skills and...timing modes. + Option to also do block level RTL design or block or top-level IP… more
- NVIDIA (Santa Clara, CA)
- … design is preferred. + Verilog expertise is preferred as is a deep understanding of ASIC design flow including RTL design and verification, DFT, and ... As a member of our CPU Cache Coherent Interconnects Design Team, you will be responsible for the physical... Team, you will be responsible for the physical design of CPU on-chip interconnect network and last-level caches,… more
- Amazon (Sunnyvale, CA)
- …a state of the art verification environment to facilitate testing of the RTL against reference Matlab/C models . Develop detailed test plans and write tests, ... to the program . Participate in the validation of ASIC implementations in Verilog/SystemVerilog . Run formal verification of...blocks to ensure functional correctness . Work with the design and communication systems team and participate in system… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is seeking elite ASIC RTL /Verification ASIC engineers to develop the core Verification and RTL infrastructure of the world's leading GPUs. This ... team of dedicated Infrastructure engineers continuously upgrades the NVIDIA Hardware design environment. We focus relentlessly on Infrastructure improvement so that… more
- Amazon (Sunnyvale, CA)
- …performance, and area for significant IPs early in design cycle -Execute on design specifications to deliver high quality RTL -Ensure quality by running and ... tracking results of front-end tools including: Synthesis, Lint ( RTL , DFT, UPF), Power Analysis and STA -Take the...to volume production -Hands on experience in low power design techniques -Strong written and verbal skills Preferred Qualifications… more