- Amazon (Cupertino, CA)
- …handling massive scale and rapid integration of emergent technologies. We're looking for an ASIC Physical Design Methodology Engineer to help us trail-blaze ... Fine tune cloud infrastructure to improve compute and storage utilization for physical design work. Interface directly with RTL , Physical Design , Package… more
- NVIDIA (Santa Clara, CA)
- …integrated logic analyzers and/or other silicon visibility tools. + Great understanding of ASIC design flow including RTL design , verification, ... looking for a Senior Design for Debug (DFD) Architect and Methodology Engineer ! NVIDIA is seeking a DFD Architect to implement hardware and software solutions to… more
- Meta (San Diego, CA)
- **Summary:** As a Digital Design Engineer at Meta Reality Labs, you will work with a world-class group of researchers and engineers, and use your digital ... our industry leading virtual and augmented reality systems. **Required Skills:** Digital Design Engineer Responsibilities: 1. Responsible for top-level or block… more
- Silvus Technologies (Irvine, CA)
- …a fulfilling career._ THE OPPORTUNITY Silvus is seeking a full-time **_Senior FPGA Design Engineer_** reporting to the _Director of FPGA Engineering_ on the _FPGA ... the research and development process from concept to field deployment. FPGA Design Engineers are responsible for the efficient implementation of novel signal… more
- ManpowerGroup (Santa Clara, CA)
- …Verilog, System Verilog, and modern verification libraries like UVM. + 10+ years of ASIC design verification experience. + Experience or background with DDR or ... a leader in the technology industry, is seeking a Design Verification Engineer to join their team....failures to determine the root cause, and collaborate with RTL and firmware engineers to resolve design … more
- Amazon (Cupertino, CA)
- …learning and AI services for our customers' businesses. We are seeking experienced Physical Design Engineer to build the next generation of our cloud server ... project tracking and visualizing QoR/stats - Interface directly with RTL , Physical Design , Package Design ,...in TCL, Perl, and/or Python - Solid understanding of ASIC physical design , physical design … more
- NVIDIA (Santa Clara, CA)
- …+ Strong coding skills in C+ + + Good understanding of ASIC Design and understanding of Verilog RTL + Strong interpersonal and collaboration skills. Ways ... a dedicated and motivated Software developer with particular interest in algorithms and RTL Design . Understanding both Software and Hardware principles will be a… more
- Amazon (San Diego, CA)
- …solutions. You will work closely with internal inter-disciplinary teams such as ASIC /RFIC designers, FW/SW engineers, design verification engineers. You will ... The Role: As a Sr. DSP and Wireless Systems Engineer working in the Digital RF Systems team, you...WiFi 802.11, BLE) . In depth knowledge of DSP design for low power consumption ASIC .… more
- Arrow Electronics (San Jose, CA)
- …close **fullchip timing** in multiple timing modes. + Option to also do block level RTL design or block or top-level IP integration. + Helping develop efficient ... **Position:** SDC Engineer (eInfochips Inc) **Job Description:** **Position: SDC ...block level SDCs and clocking diagrams and mentor other RTL design owners on SDC development. +… more
- NVIDIA (Santa Clara, CA)
- …Power Modeling, Methodology and Analysis Team, you will collaborate with Architects, ASIC Design Engineers, Low Power Engineers, Performance Engineers, Software ... are now looking for an Sr. Architecture Energy Modeling Engineer ! At NVIDIA, we pride ourselves in having energy-efficient...in energy-efficient GPU designs. + Familiarity with Verilog and ASIC design principles is a plus. +… more
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