• Architecture Energy Modeling Engineer - New…

    NVIDIA (Santa Clara, CA)
    …reduce power consumption of NVIDIA GPUs. You will collaborate with Architects, ASIC Design Engineers, Low Power Engineers, Performance Engineers, Software ... We are now looking for an Architecture Energy Modeling Engineer to join our Power Modeling, Methodology and Analysis...in energy-efficient GPU designs. + Familiarity with Verilog and ASIC design principles is a plus. +… more
    NVIDIA (08/19/25)
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  • FPGA Engineer , Platforms, Hardware

    Google (Sunnyvale, CA)
    FPGA Engineer , Platforms, Hardware + _link_ Copy link +...experience. + 4 years of experience working in an ASIC or FPGA design technical environment, or ... years of experience with an advanced degree. + Experience with Register-Transfer Level design using Verilog or SystemVerilog. + Experience in the FPGA/ ASIC more
    Google (09/28/25)
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  • Senior Synthesis Flow CAD Engineer

    NVIDIA (Santa Clara, CA)
    …with 3+ years of CAD experience; MS preferred + Be familiar with Verilog and ASIC design along with experience in commercial EDA tools + Software engineering ... implementation and analysis tools + Provide support for ASIC tools and flows + Assist chip design...Familiarity with Machine Learning/Deep Learning + Experience in other ASIC methodologies such as RTL Lint, CDC,… more
    NVIDIA (09/09/25)
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  • Principal Product Engineer

    Cadence Design Systems, Inc. (San Jose, CA)
    …be a highly motivated, optimistic, and energetic engineer with a good appreciation of ASIC design methodologies from RTL to GDSII with a strong history ... technology. This opportunity is for an engagement focused Product Engineer (PE) in the Digital and Signoff Group (DSG)...PPA tuning and Layout experience, having experience of either RTL design and/or associated tool knowledge is… more
    Cadence Design Systems, Inc. (09/09/25)
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  • Senior Systems Prototyping Engineer

    NVIDIA (Santa Clara, CA)
    …emphasis on Synopsys Protocompiler or Synplify Premier and Xilinx Vivado + Exposure to ASIC design and verification tools (VCS or equivalent, Verdi, GDB). + ... Are you passionate about DGX system connecting multiple ASIC chips together and FPGA prototyping? Are you...you'll be doing: + Build FPGA prototypes by making RTL FPGA-friendly, partitioning the design and taking… more
    NVIDIA (09/17/25)
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  • Emulation Engineer II

    Microsoft Corporation (Santa Clara, CA)
    …software and hardware expertise to create a highly programmable and high-performance ASIC with the capability to efficiently handle large data streams. Thanks to ... its integrated design , this solution empowers teams to operate with increased...performance compared to CPU-based alternatives **Responsibilities** As an Emulation Engineer II in the Data Processing Unit team you… more
    Microsoft Corporation (09/23/25)
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  • Silicon Verification Engineer

    ManpowerGroup (Mountain View, CA)
    … **Location:** Mountain View, CA **What's the Job?** + Focus on verifying the design of the ASIC /SoC using simulation, formal verification, and emulation. + ... Our client, a leader in technology innovation, is seeking a Silicon Verification Engineer to join their team. As a Silicon Verification Engineer , you will be… more
    ManpowerGroup (08/20/25)
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  • Sr. Silicon Validation Engineer , DVT…

    Amazon (San Diego, CA)
    …around the world. We are seeking a highly motivated and experienced Post-Silicon Verification Engineer with strong expertise in Digital ASIC and modem (PHY and ... functionality (PHY/MAC), power, performance, and reliability. * Collaborate closely with design , RTL verification, firmware, and systems teams to root-cause… more
    Amazon (09/07/25)
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  • Senior Hardware Engineer - Micro-Architect

    quadric.io, Inc (Burlingame, CA)
    …Ph.D. in Electrical or Computer Engineering with a minimum of five years of CPU/GPU/ ASIC front-end design + Proficiency in SystemC, SystemVerilog, or Verilog + ... processor architecture. As a senior member of our chip design team, you will contribute to all stages of...by understanding its applications + Own microarchitecture definition & RTL implementation of the processor in SystemC or SystemVerilog… more
    quadric.io, Inc (09/08/25)
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  • Sr. SDE C/C++ Hardware/Software Co- Design

    Amazon (Cupertino, CA)
    …of maintainable, documented and well tested software - Close collaboration with RTL designers, design verification engineers, and other software teams - ... Description Annapurna Labs stands at the forefront of hardware/software co- design , leading innovation not just within Amazon Web Services (AWS) but across the entire… more
    Amazon (07/24/25)
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