- Silvus Technologies (Los Angeles, CA)
- …a fulfilling career. THE OPPORTUNITY Silvus is seeking a full-time **_Senior FPGA Design Engineer_** reporting to the _Director of FPGA Engineering_ on the _FPGA ... the research and development process from concept to field deployment. FPGA Design Engineers are responsible for the efficient implementation of novel signal… more
- Amazon (Cupertino, CA)
- …learning and AI services for our customers' businesses. We are seeking experienced Physical Design Engineer to build the next generation of our cloud server ... project tracking and visualizing QoR/stats - Interface directly with RTL , Physical Design , Package Design ,...in TCL, Perl, and/or Python - Solid understanding of ASIC physical design , physical design … more
- NVIDIA (Santa Clara, CA)
- …+ Strong coding skills in C+ + + Good understanding of ASIC Design and understanding of Verilog RTL + Strong interpersonal and collaboration skills. Ways ... a dedicated and motivated Software developer with particular interest in algorithms and RTL Design . Understanding both Software and Hardware principles will be a… more
- Microsoft Corporation (Mountain View, CA)
- …manage and optimize the Cloud infrastructure. We are looking for a **Senior Design Verification Engineer ** to join the team. **Responsibilities** + Establish ... yourself as an integral member of a design verification team for the development of AI components... verification with a delivering complex Application Specific Integrated Circuits( ASIC ) or System on Chip(SOC). **Other requirements:** Ability to… more
- NVIDIA (Santa Clara, CA)
- …equivalent experience) in Electrical or Computer Engineering with 4+ years' experience in ASIC Design and Timing. + Expertise in Primetime and timing constraints ... (eg, valid crossing of clock domains across hierarchical boundaries). + Collaborate with RTL , physical design , and verification teams to drive consistency and… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …related experience in design and EDA (Digital Implementation/Signoff) + Understands ASIC Design implementation process and steps + Strong hands-on experience ... (Innovus, ICC2, Fusion Compiler) + Exposure and experience with Synthesis (Genus, RTL Compiler, Design Compiler) + Experience with EDA tools in the IC digital… more
- Amazon (San Diego, CA)
- …solutions. You will work closely with internal inter-disciplinary teams such as ASIC /RFIC designers, FW/SW engineers, design verification engineers. You will ... The Role: As a Sr. DSP and Wireless Systems Engineer working in the Digital RF Systems team, you...WiFi 802.11, BLE) . In depth knowledge of DSP design for low power consumption ASIC .… more
- Arrow Electronics (San Jose, CA)
- …close **fullchip timing** in multiple timing modes. + Option to also do block level RTL design or block or top-level IP integration. + Helping develop efficient ... **Position:** SDC Engineer (eInfochips Inc) **Job Description:** **Position: SDC ...block level SDCs and clocking diagrams and mentor other RTL design owners on SDC development. +… more
- quadric.io, Inc (Burlingame, CA)
- …What We Expect: Initiative, Collaboration, Completion Role As a member of our physical design methodology team you will be tasked with developing physical design ... process nodes. Responsibilities + Develop Quadric processor IP implementation scripts from RTL to GDS across multiple advanced process nodes. + Preform test chip… more
- NVIDIA (Santa Clara, CA)
- …with 3+ years of CAD experience; MS preferred + Be familiar with Verilog and ASIC design along with experience in commercial EDA tools + Software engineering ... implementation and analysis tools + Provide support for ASIC tools and flows + Assist chip design...Familiarity with Machine Learning/Deep Learning + Experience in other ASIC methodologies such as RTL Lint, CDC,… more