- Amazon (Cupertino, CA)
- …handling massive scale and rapid integration of emergent technologies. We're looking for an ASIC Physical Design Engineer to help us trail-blaze new ... Basic Qualifications - BS + 8yrs or MS + 6yrs in EE/CS - 6+ years in ASIC Physical Design from - RTL -to-GDSII in either 7nm, 14/16nm, 20nm, or 28nm - Block … more
- Meta (San Diego, CA)
- …machine-learning and compute-vision workloads. **Required Skills:** Digital Design Engineer Responsibilities: 1. Contribute to ASIC digital microarchitecture ... **Summary:** We are growing our ASIC Design and uArchitecture team within...Qualifications: 8. 3+ years of experience as a Hardware Design Engineer for production silicon shipped in… more
- Broadcom (San Jose, CA)
- …will be responsible for various key tasks in the areas of uArch and RTL design of cutting-edge network switch/routing Datapath designs. The day-to-day tasks for ... and working on initial floor plan. 4). Develop Verilog RTL . logic synthesis, physical implementation constraints, static timing analysis....standing. 2). Must have in-depth knowledge of IC technology, ASIC design flows, EDA tools and Physical… more
- NVIDIA (Santa Clara, CA)
- We are now hiring for a Logic and Digital Circuit Design Engineer ! NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 ... synthesis and drive for timing closure. In addition to RTL design , you'll need to understand the...of analog circuits. + You will be working with ASIC controller teams to define a unified interface +… more
- Cisco (San Jose, CA)
- …ASICs being developed in the industry. Your Impact You will work with front-end RTL Design and Verification teams and Architects to understand chip architecture ... ASIC in deployment-mode applications * You will participate in the ASIC design verification and Emulation for Cisco high-end switching products. One of the… more
- Google (Mountain View, CA)
- …field, or equivalent practical experience. + 5 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog ... architecture. + 10 years of experience with digital logic design principles, RTL design concepts,...languages such as Verilog or SystemVerilog. + Experience with ASIC design methodologies for clock domain checks,… more
- Qualcomm (San Diego, CA)
- …and Boxborough and across all levels. **What you will be doing** : Micro-architect and design RTL for blocks and modules of Adreno GPU architecture across shader ... Develop micro architecture and specification of the new generation design Develop RTL for the corresponding micro...DSP, Machine-Learning, cache, controller, video, display, camera blocks in ASIC is desired. + Exposure to Graphics API (OpenGL,… more
- Meta (San Diego, CA)
- …accelerators and state-of-the-art SoCs. **Required Skills:** Digital Design Engineer Responsibilities: 1. Contribute to ASIC digital uArchitecture and ... architecture, firmware, and algorithms.We are growing our Machine Learning ASIC Design and uArchitecture team within RL...experience. 7. 5+ years of experience as a Hardware Design Engineer for production silicon shipped in… more
- NVIDIA (Santa Clara, CA)
- We are now hiring for a Senior Logic and Digital Circuit Design Engineer ! NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in ... synthesis and drive for timing closure. In addition to RTL design , you'll need to understand the...you'll be doing: + You will be working with ASIC controller teams to define a unified interface +… more
- Qualcomm (San Diego, CA)
- …connected future for all. QCT Memory Controller Design Team is looking for ASIC Design Engineers for the next generation high speed DDR Controllers. The ... and drive the micro-architecture of portions of the logic design . You will implement and deliver RTL ...Science, Engineering, or related field and 2+ years of ASIC design , verification, validation, integration, or related… more