- Silvus Technologies (Irvine, CA)
- …of your career._ THE OPPORTUNITY Silvus is seeking a full-time **_Senior FPGA Design Engineer_** reporting to the _Director of FPGA Engineering_ on the _FPGA ... the research and development process from concept to field deployment. FPGA Design Engineers are responsible for the efficient implementation of novel signal… more
- Google (Sunnyvale, CA)
- …TPU architecture and its integration within AI/ML-driven systems. As a Custom Datapath Physical Design Engineer on the Chip Implementation team, you will work on ... equivalent practical experience. + 10 years of experience in ASIC physical design and methodologies in advanced...ROI-based recommendations to the project. + Work closely with RTL designers and inform design decisions to… more
- Meta (Sunnyvale, CA)
- …(Power, Performance, and area) of the design . **Required Skills:** Silicon Physical Design Engineer Responsibilities: 1. Develop and own physical design ... equivalent practical experience. 7. 10+ years of experience in ASIC Physical Design 8. Understanding of RTL2GDSII...power reduction techniques 17. Experience in hardware microarchitecture or RTL design 18. Master/PhD degree in EE/CS… more
- Amazon (Cupertino, CA)
- …learning and AI services for our customers' businesses. We are seeking experienced Physical Design Engineer to build the next generation of our cloud server ... project tracking and visualizing QoR/stats - Interface directly with RTL , Physical Design , Package Design ,...in TCL, Perl, and/or Python - Solid understanding of ASIC physical design , physical design … more
- NVIDIA (Santa Clara, CA)
- …+ Strong coding skills in C+ + + Good understanding of ASIC Design and understanding of Verilog RTL + Strong interpersonal and collaboration skills. Ways ... a dedicated and motivated Software developer with particular interest in algorithms and RTL Design . Understanding both Software and Hardware principles will be a… more
- Qualcomm (San Diego, CA)
- …Bachelor's degree in Science, Engineering, or related field and 6+ years of ASIC design , verification, validation, integration, or related work experience. OR ... Master's degree in Science, Engineering, or related field and 5+ years of ASIC design , verification, validation, integration, or related work experience. OR PhD… more
- Broadcom (San Jose, CA)
- …Tcl, Perl). + Proficiency in using synthesis tools (Genus) + Strong understanding of ASIC design flows, including RTL and place-and-route. + Excellent ... Description:** Broadcom is looking for a senior level STA engineer . In this highly visible role you will be...or Computer Engineering with 8+ years of experience in ASIC Design Verification or MS in Electrical… more
- quadric.io, Inc (Burlingame, CA)
- …What We Expect: Initiative, Collaboration, Completion Role As a member of our physical design methodology team you will be tasked with developing physical design ... process nodes. Responsibilities + Develop Quadric processor IP implementation scripts from RTL to GDS across multiple advanced process nodes. + Preform test chip… more
- Amazon (San Diego, CA)
- …to define a new system with few legacy constraints. The Sr. FPGA design engineer will work with systems teams to define/develop/implement/test/release FPGA based ... Create and release FPGAs through the development phases of uArchitecture- RTL Design -Physical Implementation-Timing Closure-Simulation Validation- Lab Based… more
- Qualcomm (San Diego, CA)
- …in the face of obstacles + Strong knowledge and experience on all aspects of ASIC design flow (Arch, uArch, RTL , model, verification, synthesis, physical ... best GPUs possible, for all markets. **Role** The Project Engineer (PE) is the overall technical lead for a...knowledge in at least one of the aspects of ASIC design listed above + Breadth of… more