• Design Engineer Architect/Lead

    Broadcom (Fort Collins, CO)
    …overall manufacturing yield. The candidate should have a strong understanding of VLSI and ASIC physical design 12+ years of experience w/ a deep understanding of ... on aspects including but limited to physical synthesis, influencing RTL content and coding styles that will lend itself... ASIC architecture, design , development and verification. -… more
    Broadcom (06/11/25)
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  • STA Engineer (eInfochips Inc)

    Arrow Electronics (Centennial, CO)
    …close **fullchip timing** in multiple timing modes. + Option to also do block level RTL design or block or top-level IP integration. + Helping develop efficient ... **Position:** STA Engineer (eInfochips Inc) **Job Description:** **Position: STA ...block level SDCs and clocking diagrams and mentor other RTL design owners on SDC development. +… more
    Arrow Electronics (06/19/25)
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