• ASIC Engineer, Design

    Meta (Sunnyvale, CA)
    **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure organization to build cutting edge machine learning ASICs, capable of world class ... SoC and IP for data center applications. **Required Skills:** ASIC Engineer, Design Responsibilities: 1. Micro-architecture development. 2. RTL development… more
    Meta (04/11/25)
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  • ASIC Engineering Manager, Silicon…

    Meta (Menlo Park, CA)
    …managing technical teams, including performance management 12. 10+ experience in ASIC Design , Development or Validation (Silicon bringup, validation, emulation, ... SoCs or similar designs. 22. Experience in architecting emulation systems for various design scales (IP blocks, SOC , multi-chip system) with an understanding of… more
    Meta (03/22/25)
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  • ASIC Engineer, Design

    Meta (Sunnyvale, CA)
    **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure organization to build cutting edge ASICs in fields such as machine learning, video ... SoC and IP for data center applications. **Required Skills:** ASIC Engineer, Design Responsibilities: 1. Architecture exploration 2. Micro-architecture… more
    Meta (04/03/25)
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  • ASIC Design Engineer - New College…

    NVIDIA (Santa Clara, CA)
    NVIDIA is looking for an ASIC Design Engineer to join our Memory Subsystem Team! As an ASIC Design engineer at NVIDIA, you'll join a group of ... to be responsible for the micro-architecture and design including RTL design , synthesis, functional verification and timing analysis using innovative CAD… more
    NVIDIA (04/26/25)
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  • ASIC Engineer, Emulation

    Meta (Sunnyvale, CA)
    …to adapt to emulation. 15. Experience in architecting emulation systems for various design scales (IP blocks, SOC , multi-chip system) with an understanding of ... **Summary:** Meta is hiring ASIC Emulation Engineers within our Infrastructure organization. We...and TCL scripting languages. 21. Experience interfacing with the design , verification , validation and software development teams… more
    Meta (04/17/25)
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  • ASIC Implementation Engineer - Synthesis

    Meta (Sunnyvale, CA)
    …to joining Meta **Preferred Qualifications:** Preferred Qualifications: 19. Experience in SOC Design Integration and Front-End Implementation. 20. Knowledge of ... timing constraints, synthesis to build efficient System on Chip ( SoC ) and IP for data center applications. **Required Skills:**...Power, Performance, Area. 14. Knowledge of front-end and back-end ASIC tools. 15. Experience with RTL design … more
    Meta (04/18/25)
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  • ASIC Implementation Engineer - Synthesis

    Meta (Sunnyvale, CA)
    …practical experience **Preferred Qualifications:** Preferred Qualifications: 17. Experience in SOC Design Integration and Front-End Implementation. 18. Knowledge ... timing constraints, synthesis to build efficient System on Chip ( SoC ) and IP for data center applications. **Required Skills:**...Power, Performance, Area. 12. Knowledge of front-end and back-end ASIC tools. 13. Experience with RTL design … more
    Meta (04/16/25)
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  • SoC Power Design Engineer (Server)

    Qualcomm (San Diego, CA)
    …work with frontend RTL, DFT, Synthesis, Design Verification and Physical Design teams during the SoC development. Also the candidate will have the ... design verification in validating low power design featurs at SoC and IP level....Science, Engineering, or related field and 2+ years of ASIC design , verification , validation, integration,… more
    Qualcomm (02/13/25)
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  • ASIC Timing and Methodology Engineer

    Qualcomm (San Diego, CA)
    …* Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design , verification , validation, integration, or related work experience. ... will work with best-in-class methodologies, tools and technology to design innovative SOC products at the block/IP-level...Science, Engineering, or related field and 3+ years of ASIC design , verification , validation, integration,… more
    Qualcomm (04/15/25)
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  • ASIC Engineering Technical Leader

    Cisco (San Jose, CA)
    …meet timing and performance requirements. * Help define, evolve, and support our design methodology. * Collaborate with the verification team on as-needed basis ... Do Be part of the development organization as an ASIC Engineering Technical Leader with primary focus on RTL...You'll Work With You will work with front-end RTL Design and Verification teams and Architects to… more
    Cisco (05/02/25)
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