- Google (Mountain View, CA)
- …evaluating trade-offs such as speed, performance, power, area. + Good understanding of ASIC design flow including RTL design, verification , logic synthesis and ... experience in micro-architecture definition. + 3+ years of experience in RTL design verification . + Experience with high performance compute IPs (eg, GPUs, DSPs, or… more
- NVIDIA (Santa Clara, CA)
- …logic analyzers and/or other silicon visibility tools. + Great understanding of ASIC design flow including RTL design, verification , logic synthesis, timing ... many other teams at NVIDIA. + Work closely with software, architecture, design, verification , and silicon validation teams. + Train and mentor junior engineers and… more
- Broadcom (Irvine, CA)
- …Designs and develops integrated analog circuits. Oversees definition, design, verification , and documentation for ASIC development. Determines circuit ... design and system simulation. Defines module interfaces/formats for simulation. Contributes to the development of multidimensional designs involving the layout of complex integrated circuits. Evaluates all aspects of the process flow from high-level design to… more
- Broadcom (San Jose, CA)
- …Group at Broadcom has brought some of the most complex and cutting-edge networking ASIC 's and multichip solutions to market over the last decade. The group develops ... ASIC 's for L2/L3 switch routing. These products support the...on initial floor plan. 5). Develop Verilog RTL. design verification support, logic synthesis, physical implementation constraints, static timing… more
- SpaceX (Sunnyvale, CA)
- …cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation). In this role, you will be developing ... level design for testability (DFT) planning + Collaborate with chip architects, ASIC engineers, package engineers and block level physical design engineers to drive,… more
- Broadcom (San Jose, CA)
- …part of a team tasked with the support of IC Designs for IPs and ASIC designs. Commitment to team success, customer satisfaction, first time right quality, & ease of ... use is critical. **Responsibilities:** Develop and support design automation flows for ASIC products and associated IPs. This role involves + Physical … more
- Google (Mountain View, CA)
- …of multi-disciplinary silicon engineers, including RTL, Physical Design (PD), Design Verification (DV), and post-silicon bringup. + Define and drive the end-to-end ... and ensure hardware-software co-design. + Own technical decision-making for the full ASIC lifecycle, from architecture handover to production. About You We seek out… more
- Amazon (Cupertino, CA)
- …scale and rapid integration of emergent technologies. We're looking for an ASIC Physical Design Engineer to help us trail-blaze new technologies and architectures, ... distribution, congestion analysis, timing closure, IR drop analysis, physical verification , ECO and sign-off - Develop physical design methodologies...MS + 6yrs in EE/CS - 6+ years in ASIC Physical Design from - RTL-to-GDSII in either 7nm,… more
- Western Digital (San Jose, CA)
- …methods for the EDA design environments with focus on analog / mixed signal ASIC design in advanced nodes + Tool evaluation, testing, validation and customer support ... and Utilities development in Cadence SKILL/SKILL++ Development of Calibre/Pegasys Physical Verification decks for CMOS PLANAR technologies including DRC, LVS, PERC,… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …function to bridge and gate-keep the full integration, validation, and characterization of ASIC , HW/PCB, SW, FW, and FPGA subsystems in the whole development cycle. ... also applies to system bring-up and testing, methodology development and verification . Key responsibilities + Leverage silicon verification platform and… more