• Staff R&D Engineer Adv Tech Dev

    Broadcom (San Jose, CA)
    …and package designs for product release sign off + Provide support for timing, physical verification signoff to make IP & ASIC designs robust + Perform WAT & ... and simulation, abstract and LEF/DEF generation, LVS/ERC checks, physical verification + Conducting design reviews & creating slides and...**Job Description** + Provide design support for IP & ASIC to create robust designs in line with advanced… more
    Broadcom (07/11/25)
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  • Graphics (GPU) Hardware Project Engineer

    Qualcomm (San Diego, CA)
    …the face of obstacles + Strong knowledge and experience on all aspects of ASIC design flow (Arch, uArch, RTL, model, verification , synthesis, physical design) in ... teams & domains such as system architecture & modeling, hardware design, verification , silicon implementation, validation, and ultimately, product launch of the SOC… more
    Qualcomm (06/29/25)
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  • Digital Design Engineer, Reality Labs Silicon AI…

    Meta (Sunnyvale, CA)
    …research silicon to demonstrate and integrate advanced IP and AI accelerators into SOC/ ASIC solutions to enable in-system testing and prototyping. The goal is to ... effective collaboration and communication with Digital Design Engineers, Digital Verification Engineers, Research Scientists and Cross Functional Partner teams will… more
    Meta (08/01/25)
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  • Digital Design Engineer - Reality Lab Silicon AI…

    Meta (Sunnyvale, CA)
    …research silicon to demonstrate and integrate advanced IP and AI accelerators into SOC/ ASIC solutions to enable in-system testing and prototyping. The goal is to ... Additionally, effective collaboration and communication with Digital Design Engineers, Digital Verification Engineers, Research Scientists and XFN teams will be key… more
    Meta (08/01/25)
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  • Sr. Physical Design Engineer, Annapurna Labs

    Amazon (Cupertino, CA)
    …scale and rapid integration of emergent technologies. We're looking for an ASIC Physical Design Engineer to help us trail-blaze new technologies and architectures, ... distribution, congestion analysis, timing closure, IR drop analysis, physical verification , ECO and sign-off - Develop physical design methodologies...MS + 6yrs in EE/CS - 6+ years in ASIC Physical Design from - RTL-to-GDSII in either 7nm,… more
    Amazon (06/04/25)
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  • Physical Design Flow and Methodology Engineer

    Google (Sunnyvale, CA)
    …behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on ... vendors, provide recommendations and employ best practices. Your work will streamline ASIC physical design workflows, make our team of physical design engineers more… more
    Google (08/08/25)
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  • GPU Power Systems Engineer

    Qualcomm (San Diego, CA)
    …with VLSI design and verification + 8+ years of experience with low-power ASIC design techniques + Experience with industry tools such as PrimeTime PX and Power ... closely with multiple teams such as RTL designer, architecture, design verification , compiler, driver, silicon implementation, and post-silicon teams + Knowledge of… more
    Qualcomm (06/03/25)
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  • Sr. Physical Design Methodology Engineer,…

    Amazon (Cupertino, CA)
    …scale and rapid integration of emergent technologies. We're looking for an ASIC Physical Design Methodology Engineer to help us trail-blaze new technologies and ... job responsibilities Define, develop and deploy innovative physical design and verification methodologies (RTL2GDS) for ML Accelerator chips in advanced nodes Drive… more
    Amazon (07/26/25)
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  • Sr. DSP and Wireless Systems Engineer, Digital RF…

    Amazon (San Diego, CA)
    …solutions. You will work closely with internal inter-disciplinary teams such as ASIC /RFIC designers, FW/SW engineers, design verification engineers. You will ... plans and test procedures for pre-silicon, help with design verification as well as post silicon validation, integration and...depth knowledge of DSP design for low power consumption ASIC . Experience with MATLAB, Python and/or C/C++ for… more
    Amazon (06/28/25)
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  • Physical Design Engineer (eInfochips Inc)

    Arrow Electronics (Santa Clara, CA)
    …or computer engineering, accompanied by a minimum of 8 years of experience in ASIC or a related field, or a master's degree in electrical or computer engineering ... with at least 8 years of experience in ASIC or related discipline. + Proficiency in Cadence tools...+ Proficiency in Cadence tools like Virtuso & P&R Verification toolset. **What's In It for You:** + At… more
    Arrow Electronics (07/25/25)
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