• Lead Electrical Engineer

    L3Harris (Yorba Linda, CA)
    …description document, etc.) and flow down applicable requirements to other groups (software, ASIC , & test) so that they can contribute to realize the end solution ... plans. . Ability to develop circuit designs, requirements, design descriptions, verification plans/procedures, customer CDRLs to meet program schedules. . Ability to… more
    L3Harris (11/22/25)
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  • Senior Component Engineer

    Palo Alto Networks (Santa Clara, CA)
    …component manufacturers to root cause and corrective action implementation and verification . Be the technical point person for component quality/performance issues. ... is a huge plus. + Demonstrated broad technical competence in multiple technologies ( ASIC , FPGA, Comm IC, Processor, SSD) with expert level experience in one or… more
    Palo Alto Networks (10/16/25)
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  • Senior Software Engineer, Hardware Tools…

    NVIDIA (Santa Clara, CA)
    …work experience + Strong coding skills in C+ + + Good understanding of ASIC Design and understanding of Verilog RTL + Strong interpersonal and collaboration skills. ... to stand out from the crowd: + Prior experience in RTL design (Verilog), verification and synthesis. + Proficiency in C++, Perl, Python, Make scripting. + Knowledge… more
    NVIDIA (10/11/25)
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  • Design Engineer, Emulation

    Cadence Design Systems, Inc. (San Jose, CA)
    …system chips from emulation/bringup to production + Working on chip design verification , emulation and Post Silicon Validation; + Support the system software team ... in MS/BS in Electrical Engineering, Computer Engineering, or a similar major. * Experience with ASIC / RTL / HW Development * Interest and knowledge of verif / post… more
    Cadence Design Systems, Inc. (01/08/26)
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  • Principal FPGA / Rtl Design Engineer - Signal…

    Silvus Technologies (Los Angeles, CA)
    …test bench development. + FPGA synthesis and timing closure. + Hardware verification and troubleshooting; familiarity with logic analyzers. + Provide support to the ... presentation skills. + Experience with wireless communication systems on FPGA or ASIC designs. WORKING CONDITIONS & PHYSICAL REQUIREMENTS + Office environment. +… more
    Silvus Technologies (01/06/26)
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  • Technologist , Systems Design Engineering

    SanDisk (Milpitas, CA)
    …to various functions of Memory teams to meet systems specs. + Define ASIC requirements for upcoming new NAND Flash based chips and design systems algorithms. ... products + Work with Architecture and Firmware team on detailed implementation and verification plan. + Monitor NAND readiness and work with Product test teams on… more
    SanDisk (01/03/26)
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  • EDA Workflow Optimization Engineer

    NVIDIA (Santa Clara, CA)
    …full chip design process from inception through study, architecture, design, verification , emulation, layout, packaging, power-on and production. You will then guide ... (storage, networking, compute) our chip engineers depend on. + Experience with ASIC , VLSI, CAD/EDA or mixed signal design workflow environments. + Hands-on… more
    NVIDIA (01/02/26)
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  • Principal FPGA / Rtl Design Engineer

    Silvus Technologies (Irvine, CA)
    …test bench development. * FPGA synthesis and timing closure. * Hardware verification and troubleshooting; familiarity with logic analyzers. * Provide support to the ... communication and presentation skills. * Experience with wireless communication systems on FPGA or ASIC designs. The pay range is NOT a guarantee, is based on market… more
    Silvus Technologies (01/02/26)
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  • Lead Applications Engineer - DDR Design IP

    Cadence Design Systems, Inc. (San Jose, CA)
    …. Experience with simulation and synthesis tools . Strong knowledge of ASIC flow, RTL/Verilog . Individual leadership and initiative to manage pre-sales accounts ... skills is a must Nice to have : . Experience on memory subsystem verification and/or performance analysis . Knowledge of System Verilog and FPGA design . Knowledge… more
    Cadence Design Systems, Inc. (01/02/26)
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  • R&D IC Design Engineer

    Broadcom (Irvine, CA)
    …etc. prepare block level resource requirements & development schedule generate verification & test plans for design validation Perform design tradeoff analysis ... and design for manufacturing. Good Knowledge in languages relevant to the ASIC development process including Verilog, VHDL, Unix/Perl Scripting or Python, and C.… more
    Broadcom (12/30/25)
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