• Micro-Architect/Logic Designer (Memory Controller)

    Samsung Electronics Co., Ltd. (Austin, TX)
    …designs + Verilog expertise is required as is a deep understanding of ASIC design flow including RTL design, verification , logic synthesis, timing analysis ... a senior level role where you will interact with the system architects, verification , performance/power and design implementation teams. You will be own and drive… more
    Samsung Electronics Co., Ltd. (09/29/25)
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  • Sr. Physical Design Engineer, Annapurna Labs

    Amazon (Austin, TX)
    …scale and rapid integration of emergent technologies. We're looking for an ASIC Physical Design Engineer to help us trail-blaze new technologies and architectures, ... distribution, congestion analysis, timing closure, IR drop analysis, physical verification , ECO and sign-off - Develop physical design methodologies...MS + 6yrs in EE/CS - 6+ years in ASIC Physical Design from - RTL-to-GDSII in either 7nm,… more
    Amazon (09/02/25)
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  • Principal Digital Engineer

    Renesas (Austin, TX)
    …and high-speed design concepts + Participate in design, architecture, and verification reviews + Oversee digital backend design, including synthesis, static timing ... and logic equivalence checking + Create documentation targeting design, verification , and test teams + Assist with the proposal,...of experience + 8+ years of direct experience in ASIC /IC design with deep knowledge of the entire IC… more
    Renesas (09/23/25)
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  • Sr. Communication Systems Design Engineer

    Amazon (Austin, TX)
    …etc. This role will also play a critical role in the design, integration and verification of various HW and SW sub-systems as a part of system integration and link ... bring-up and verification . In this role you will: * Design advanced...solutions for the Kuiper communication system. * Work with ASIC development teams to build power/area efficient L1/L2 HW… more
    Amazon (09/20/25)
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  • Sr Principal DFT Application Engineer

    Cadence Design Systems, Inc. (Austin, TX)
    …to make an impact on the world of technology. We are looking for SoC/ ASIC Digital Design Engineer with experience in Design for Test (DFT). An intimate knowledge ... is highly desirable for candidate to possess hands-on knowledge of synthesis, verification and debugging Verilog testbenches. + Prior 5-15 years of professional… more
    Cadence Design Systems, Inc. (09/05/25)
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  • Principal Design Engineer Manager - AI Network…

    Microsoft Corporation (Austin, TX)
    …timing closure of high-performance digital IP. + Collaborate with the verification team to ensure the implementation meets both architectural and micro-architectural ... microarchitecture specification development, RTL coding in Verilog/System Verilog, design verification collaboration, and CDC/Lint closure. + 3+ years of experience… more
    Microsoft Corporation (09/26/25)
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  • Wireless Integration and Test Engineer

    Amazon (Austin, TX)
    …loss etc. This role will also play a critical role in the integration and verification of various HW and SW sub-systems as a part of system integration and link ... bring-up and verification . As a part of this effort this role...attenuators etc. * Unblock themselves with reaching out RF, ASIC , SW, Comsys, Testbed teams to move forward in… more
    Amazon (09/20/25)
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  • Systems Engineer 2

    Skyworks (Austin, TX)
    …System and platform design leveraging Skyworks Timing portfolio. - Lead definition, verification and validation of timing products. - Develop FPGA IP for emulation, ... system performance. . Collaborate with the design team to develop verification /validation tests for silicon under development. . Collaborate with marketing and… more
    Skyworks (08/28/25)
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  • Digital Design Engineer

    Meta (Austin, TX)
    …of Computer Vision/Image Sensing IP. 2. Contribute to chip-level integration, verification plan development and verification . 3. Define timing constraints, ... 16. SystemVerilog OVM/UVM experience. 17. Experience in SoC integration and ASIC architecture. 18. Experience with low power design and optimization, including… more
    Meta (08/11/25)
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  • Electrical Engineering Lead

    Lockheed Martin (Grand Prairie, TX)
    …CCA / ASIC / FPGA life cycle \(architecture, design, simulation, verification , validation, integration & test\) \- Expert in programming Field Programmable Gate ... Arrays \(FPGA\) or Complex Programmable Logic Devices \(CPLD\) \- Expert in using digital oscilloscopes, power meters, and other test equipment \- Experience with standard complex subsytem interfaces using PCIe, Ethernet, etc\. \- Experience Integrating… more
    Lockheed Martin (09/25/25)
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