- Teledyne (Milpitas, CA)
- …networking. **Role Overview** We are looking for a top-notch Staff Logic Design engineer who has the right composition of knowledge, experience, team play, spirit ... products. Join our high-speed Protocol Team as a **Staff** **Logic Design Engineer ** , where you'll architect and implement high-performance digital logic for… more
- Google (Sunnyvale, CA)
- …product teams to ensure that goals are met with systems and will work with ASIC /FPGA, software, and verification teams to ensure proper verification of ... Senior Hardware Systems Design Engineer , Board and Systems _corporate_fare_ Google _place_ Sunnyvale,...technical roadmaps. **About the job** As a Senior Hardware Engineer , you will work on ML/AI hardware systems projects… more
- Google (Sunnyvale, CA)
- …Product teams to ensure that goals are met with systems and will work with ASIC /FPGA, Software, and Verification teams to ensure proper verification of ... Staff Hardware Systems Design Engineer , Board and Systems _corporate_fare_ Google _place_ Sunnyvale,...SPI, etc. **About the job** As a Staff Hardware Engineer , you will work on Machine Learning/AI hardware systems… more
- Google (Sunnyvale, CA)
- …Signal Integrity etc.) to design the desired product. You will also work with ASIC /FPGA, software, and verification teams to ensure proper verification of ... Hardware Engineer , Platforms, University Graduate _corporate_fare_ Google _place_ Sunnyvale,...delivering unparalleled performance, efficiency, and integration. As a Hardware Engineer in the board and system design team, you… more
- Google (Mountain View, CA)
- RTL Design Engineer , Multimedia and Machine Learning Accelerators _corporate_fare_ Google _place_ Mountain View, CA, USA **Mid** Experience driving progress, solving ... Property (IP)(Camera, Display or COdec) or Machine Learning IP. + Experience with ASIC design methodologies for clock domain checks and reset checks. + Proficiency… more
- Broadcom (San Jose, CA)
- …be responsible for leading most complex and cutting edge network switching ASIC DFx (Design for Test/debug & manufacturability) from DFT architecture, to ... implementation, verification , timing closure, ATE pattern bringup. . You will...verbal and written communication skills. + Must be self-driven engineer with good project management and organizational skills to… more
- Amazon (Sunnyvale, CA)
- …Sr. RTL Design Engineer - Wireless Modem within a high performance ASIC design team. This team is using industry leading methodologies to develop proprietary ... solutions, and meeting the power objectives . Create standalone verification test bench to verify the correctness of your...the correctness of your block. . Work with the verification team and participate in System level verification… more
- Silvus Technologies (Irvine, CA)
- …test bench development. + FPGA synthesis and timing closure. + Hardware verification and troubleshooting; familiarity with logic analyzers. + Provide support to the ... (MSEE). + Basic MATLAB skill. + Experience with communication systems on FPGA or ASIC designs. **COMPENSATION** _The pay range is NOT a guarantee. It is based on… more
- NVIDIA (Santa Clara, CA)
- …our life's work, to amplify human creativity and intelligence. Are you a Mask Layout Design Engineer ? If yes, We would love to hear from you! We are looking for a ... Senior Mask Layout Design Engineer , someone who is excited to join a growing...using Cadence tools. + You'll work cross functionally with ASIC and mixed-signal engineers to customize designs for integration… more
- Cisco (Milpitas, CA)
- …with a fully unified routing and switching portfolio. **Your Impact** The FPGA Engineer will get to work with cutting edge, next generation routers powering AI ... team that designs control path FPGAs for the various boards. The Engineer will interface with diagnostics, software, board design, manufacturing and hardware… more
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