- Broadcom (San Jose, CA)
- …and package designs for product release sign off + Provide support for timing, physical verification signoff to make IP & ASIC designs robust + Perform WAT & ... and simulation, abstract and LEF/DEF generation, LVS/ERC checks, physical verification + Conducting design reviews & creating slides and...**Job Description** + Provide design support for IP & ASIC to create robust designs in line with advanced… more
- Amazon (San Diego, CA)
- …solutions. You will work closely with internal inter-disciplinary teams such as ASIC /RFIC designers, FW/SW engineers, design verification engineers. You will ... The Role: As a Sr. DSP and Wireless Systems Engineer working in the Digital RF Systems team, you...plans and test procedures for pre-silicon, help with design verification as well as post silicon validation, integration and… more
- Google (Sunnyvale, CA)
- …behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on ... vendors, provide recommendations and employ best practices. Your work will streamline ASIC physical design workflows, make our team of physical design engineers more… more
- Amazon (Cupertino, CA)
- …massive scale and rapid integration of emergent technologies. We're looking for an ASIC Physical Design Methodology Engineer to help us trail-blaze new ... job responsibilities Define, develop and deploy innovative physical design and verification methodologies (RTL2GDS) for ML Accelerator chips in advanced nodes Drive… more
- Cisco (San Jose, CA)
- …enhancing simulation accuracy, performance, and multi-functional collaboration. + Work closely with ASIC design and verification teams from initial definition to ... Hardware Modeling Engineer Apply (https://jobs.cisco.com/jobs/Login?projectId=1441704) + Location:San Jose, California, US...now part of Cisco, is the heart of Cisco's ASIC design group. You'll be part of our team… more
- Arrow Electronics (Santa Clara, CA)
- **Position:** Physical Design Engineer (eInfochips Inc) **Job Description:** **Position: Sr. Physical Design Engineer (eInfochips Inc)** **Location: USA ... by a minimum of 8 years of experience in ASIC or a related field, or a master's degree...+ Proficiency in Cadence tools like Virtuso & P&R Verification toolset. **What's In It for You:** + At… more
- Arrow Electronics (San Jose, CA)
- **Position:** SDC Engineer (eInfochips Inc) **Job Description:** **Position: SDC Engineer (eInfochips Inc)** **Location: San Jose CA (Day-1 Onsite)** **What ... in Electrical or Computer Engineering with 7+ years of ASIC or related experience or Master's Degree in Electrical...Spyglass CDC and glitch analysis + Experience using Formal Verification : Synopsys Formality and Cadence LEC. + Experience with… more
- Cisco (San Jose, CA)
- …Engineering or Computer Science, with 10+ year minimum of hands-on experience in ASIC implementation and Physical verification + Experience in deep submicron ... Physical Design Lead Engineer Apply (https://jobs.cisco.com/jobs/Login?projectId=1436295) + Location:San Jose, California, US + Area of InterestEngineer - Hardware +… more
- Amazon (Sunnyvale, CA)
- …is powering the latest generation of Echo devices is looking for a Sr. Physical Design Engineer to continue to innovate on behalf of our customers. We are a part of ... hard. Have fun. Make history. As a Physical Design Engineer , you will: - Work with RTL/logic designers to...level. - Drive block physical implementation through synthesis, formal verification , floor planning, bus / pin planning, place and… more
- Qualcomm (San Diego, CA)
- …with VLSI design and verification + 8+ years of experience with low-power ASIC design techniques + Experience with industry tools such as PrimeTime PX and Power ... closely with multiple teams such as RTL designer, architecture, design verification , compiler, driver, silicon implementation, and post-silicon teams + Knowledge of… more