• Electrical Engineer (Associate, Mid-Level,…

    The Boeing Company (El Segundo, CA)
    …Analysis * Power Supply * Electronics Packaging * ASIC FPGA Development and Verification * Electrical Design System Engineer * RF Microwave Engineer * ... Electrical Power Systems & Battery/Solar Array Electrical Design * Antenna RF & Arrays * RF Digital Communications **Position Responsibilities:** + Analyzes customer and system requirements to develop basic architectural approaches and detailed specifications… more
    The Boeing Company (11/08/25)
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  • Senior Applications Engineer - DDR Design…

    Cadence Design Systems, Inc. (San Jose, CA)
    …DDR4/5, LPDDR4/5/5X, HBM2/3, GDDR6* Perl/Python Scripts* Experience on memory subsystem verification and/or performance analysis* Strong knowledge of ASIC flow, ... an impact on the world of technology. Senior Applications Engineer - DDR Design IPJob Location: San Jose, CAJob...Join the High-Performance Culture at Cadence.As a Technical Presales Engineer , you will support the technical presales of DDR… more
    Cadence Design Systems, Inc. (10/11/25)
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  • Principal FPGA / Rtl Design Engineer…

    Silvus Technologies (Los Angeles, CA)
    …career._ THE OPPORTUNITY Silvus is seeking a **_Principal FPGA / RTL Design Engineer - Signal Processing_** who will report to the _Director of FPGA Engineering_ on ... test bench development. + FPGA synthesis and timing closure. + Hardware verification and troubleshooting; familiarity with logic analyzers. + Provide support to the… more
    Silvus Technologies (10/08/25)
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  • Principal FPGA / Rtl Design Engineer

    Silvus Technologies (Irvine, CA)
    …career._ THE OPPORTUNITY Silvus is seeking a full-time Principal FPGA / RTL Design Engineer who will report to the Senior Engineering Director for Irvine and work ... addressing challenging real-world communication needs. The Principal FPGA / RTL Design Engineer position will be based at Silvus' Irvine CA engineering facility… more
    Silvus Technologies (10/03/25)
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  • Senior Mask Design Engineer - Hardware

    NVIDIA (Santa Clara, CA)
    …our life's work, to amplify human creativity and intelligence. Are you a Mask Layout Design Engineer ? If yes, We would love to hear from you! We are looking for a ... Senior Mask Layout Design Engineer , someone who is excited to join a growing...technologies using Cadence tools. + You'll work multi-functional with ASIC and mixed-signal engineers to customize designs for integration… more
    NVIDIA (08/28/25)
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  • Senior Component Engineer

    Palo Alto Networks (Santa Clara, CA)
    …**Your Career** We are seeking an experienced and highly motivated Senior Component Engineer to join our exciting, fast growing company and reports to the Director ... component manufacturers to root cause and corrective action implementation and verification . Be the technical point person for component quality/performance issues.… more
    Palo Alto Networks (10/16/25)
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  • VLSI CAD Engineer

    NVIDIA (Santa Clara, CA)
    …a lasting impact on the world! We are currently looking for a Software/CAD engineer to join our team of dedicated engineers developing the custom circuits that help ... chance to create novel flows for circuit design and verification to help expedite chip development. What you will...and Monte Carlo simulations. + Previous work in VLSI, ASIC , or EDA is a definite plus. + Ability… more
    NVIDIA (10/01/25)
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  • Lead C++ Software Engineer

    Cadence Design Systems, Inc. (San Jose, CA)
    …area. + Ideally you are a solid contributor in the FPGA or ASIC prototyping/synthesis/ verification space and have delivered great QoR on these platforms. ... impact on the world of technology. We are looking for an exceptional C++ software engineer to join the Protium Software Development Team to d evelop and enhance the… more
    Cadence Design Systems, Inc. (09/30/25)
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  • Senior Design for Debug Architect and Methodology…

    NVIDIA (Santa Clara, CA)
    …logic analyzers and/or other silicon visibility tools. + Great understanding of ASIC design flow including RTL design, verification , logic synthesis, timing ... a Senior Design for Debug (DFD) Architect and Methodology Engineer ! NVIDIA is seeking a DFD Architect to implement...at NVIDIA. + Work closely with software, architecture, design, verification , and silicon validation teams. + Train and mentor… more
    NVIDIA (09/10/25)
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  • Senior RTL Design Engineer , Low Power, ML…

    Google (Sunnyvale, CA)
    Senior RTL Design Engineer , Low Power, ML Accelerators _corporate_fare_ Google _place_ Sunnyvale, CA, USA **Mid** Experience driving progress, solving problems, and ... + 5 years of experience in logic design, digital ASIC , or SoC design. + Experience with RTL (Register...loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a… more
    Google (11/20/25)
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