• Senior Design for Debug Architect and Methodology…

    NVIDIA (Santa Clara, CA)
    …logic analyzers and/or other silicon visibility tools. + Great understanding of ASIC design flow including RTL design, verification , logic synthesis, timing ... a Senior Design for Debug (DFD) Architect and Methodology Engineer ! NVIDIA is seeking a DFD Architect to implement...at NVIDIA. + Work closely with software, architecture, design, verification , and silicon validation teams. + Train and mentor… more
    NVIDIA (09/10/25)
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  • Senior RTL Design Engineer , Low Power, ML…

    Google (Sunnyvale, CA)
    Senior RTL Design Engineer , Low Power, ML Accelerators _corporate_fare_ Google _place_ Sunnyvale, CA, USA **Mid** Experience driving progress, solving problems, and ... + 5 years of experience in logic design, digital ASIC , or SoC design. + Experience with RTL (Register...loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a… more
    Google (11/20/25)
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  • DFT Engineer

    Broadcom (San Jose, CA)
    …before you apply.** **Job Description:** Broadcom is looking for highly qualified DFT engineer . In this role you will be contributing to the highly integrated ... or Computer Engineering with 10+ years of experience in ASIC DFT development for serial high-speed data center networking....tools to generate verilog and ATE vectors and cross verification . + Experience with GLS and timing analysis. +… more
    Broadcom (11/01/25)
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  • Senior Methodology Engineer , CAD Tool…

    NVIDIA (Santa Clara, CA)
    …a lasting impact on the world! We are currently looking for a Senior Methodology Engineer to develop and support our CAD tooling in our Circuit Solutions Group ! In ... EDA tool and design collaterals to streamline design and verification workflows + Work closely with design engineers to...out from the crowd: + Previous work in VLSI, ASIC , or EDA is a definite plus + Experience… more
    NVIDIA (10/21/25)
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  • Cyber Systems Security Engineer - Skunk…

    Lockheed Martin (Palmdale, CA)
    **Description:** The Cyber Systems Security Engineer Staff will be responsible for leading a team of fellow engineers in the designing, assembly, integration, and ... This includes network planning, hardware installation, software integration support, verification , and validation of system functionality\. In addition to designing… more
    Lockheed Martin (10/10/25)
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  • Senior Systems Software Engineer - GPU

    NVIDIA (Santa Clara, CA)
    We are looking for a hard-working and experienced system software engineer to join our team and work on innovative datacenter interconnects. You will be responsible ... This role will require extensive collaboration with GPU architects, system architects, ASIC designers and other FW/SW teams to produce world class products. What… more
    NVIDIA (10/08/25)
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  • Sr. Hardware Engineer - ML Acceleration,…

    Amazon (Cupertino, CA)
    …as well as performance, power, area analysis and trade-offs - Experience with modern ASIC /FPGA design and verification tools - Experience with SOC bring-up and ... that help our customers change the world. We are seeking a Hardware Design Engineer with role in the definition, design and validation of AWS next generation ML… more
    Amazon (10/06/25)
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  • Lead Applications Engineer - DDR Design IP

    Cadence Design Systems, Inc. (San Jose, CA)
    …Join the High-Performance Culture at Cadence. As a Lead Technical Presales Engineer , you will use your knowledge of different memory interface standards to ... with simulation and synthesis tools . Strong knowledge of ASIC flow, RTL/Verilog . Individual leadership and initiative to...Nice to have : . Experience on memory subsystem verification and/or performance analysis . Knowledge of System Verilog… more
    Cadence Design Systems, Inc. (10/04/25)
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  • EDA Workflow Optimization Engineer

    NVIDIA (Santa Clara, CA)
    …GPU in 1999 to reshape PC gaming and modern computer graphics. As an engineer in our EDA Workflow Optimization team, you will partner closely with our engineering ... full chip design process from inception through study, architecture, design, verification , emulation, layout, packaging, power-on and production. You will then guide… more
    NVIDIA (10/03/25)
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  • Physical Design Engineer

    Broadcom (San Jose, CA)
    …Sign-In before you apply.** **Job Description:** **Broadcom is looking for a senior level ASIC physical design engineer . In this highly visible role, you will be ... speed clock constraints and specification.** + **Good understanding of physical design verification methodology to debug LVS/DRC issues at the chip and block… more
    Broadcom (09/26/25)
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