- Google (Sunnyvale, CA)
- …Signal Integrity etc.) to design the desired product. You will also work with ASIC /FPGA, software, and verification teams to ensure proper verification of ... hardware experiences, delivering unparalleled performance, efficiency, and integration. As a Hardware Engineer in the board and system design team, you will work on… more
- NVIDIA (Santa Clara, CA)
- …logic analyzers and/or other silicon visibility tools. + Great understanding of ASIC design flow including RTL design, verification , logic synthesis, timing ... a Senior Design for Debug (DFD) Architect and Methodology Engineer ! NVIDIA is seeking a DFD Architect to implement...at NVIDIA. + Work closely with software, architecture, design, verification , and silicon validation teams. + Train and mentor… more
- NVIDIA (Santa Clara, CA)
- …emphasis on Synopsys Protocompiler or Synplify Premier and Xilinx Vivado + Exposure to ASIC design and verification tools (VCS or equivalent, Verdi, GDB). + ... We are now looking for a Senior FPGA Prototyping Engineer to join our Emulation team onsite in Santa...of the design. + Good coordination with architects, designers, verification engineers, and SW teams will be needed to… more
- Meta (Sunnyvale, CA)
- …through architecture, to firmware, and algorithms.As an SoC Physical Design Engineer at Meta Reality Labs, you will perform physical design implementation ... needed for our wearable products. **Required Skills:** SoC Physical Design Engineer Responsibilities: 1. Physical design implementation from RTL to netlist for… more
- NVIDIA (Santa Clara, CA)
- …We would love to hear from you! Are you looking for a Mask layout Design Engineer role? We are looking for a Senior Mask Layout Design Engineer ! Someone who ... CMOS technologies using Cadence tools. + You'll work cross functionally with ASIC and mixed-signal engineers to customize designs for integration in VLSI products.… more
- Silvus Technologies (Los Angeles, CA)
- …test bench development. + FPGA synthesis and timing closure. + Hardware verification and troubleshooting; familiarity with logic analyzers. + Provide support to the ... designs. + Basic MATLAB skill. + Experience with communication systems on FPGA or ASIC designs. **COMPENSATION** _The pay range is NOT a guarantee. It is based on… more
- Silvus Technologies (Irvine, CA)
- …career. THE OPPORTUNITY Silvus is seeking a full-time Principal FPGA / RTL Design Engineer who will report to the Senior Engineering Director for Irvine and work ... addressing challenging real-world communication needs. The Principal FPGA / RTL Design Engineer position will be based at Silvus' Irvine CA engineering facility… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …outcomes for our customers. You will be a highly motivated, optimistic, and energetic engineer with a good appreciation of ASIC design methodologies from RTL to ... technology. This opportunity is for an engagement focused Product Engineer (PE) in the Digital and Signoff Group (DSG)...Innovus + Experience in Logic Design and Synthesis, Formal Verification , Low Power design, Physical Design and Timing Closure… more
- Qualcomm (San Diego, CA)
- …Machine learning, IoT and Automotive. This position involves in-depth understanding of the ASIC design flow from RTL to GDS2 and the challenges posed by advanced ... detailed understanding of RTL design, synthesis, static timing analysis, formal verification , PLDRC, clock domain crossing, and low power techniques. Knowledge and… more
- Broadcom (San Jose, CA)
- …Sign-In before you apply.** **Job Description:** **Broadcom is looking for a senior level ASIC physical design engineer . In this highly visible role, you will be ... speed clock constraints and specification.** + **Good understanding of physical design verification methodology to debug LVS/DRC issues at the chip and block… more