• Staff Hardware Systems Design Engineer…

    Google (Sunnyvale, CA)
    …Product teams to ensure that goals are met with systems and will work with ASIC /FPGA, Software, and Verification teams to ensure proper verification of ... + Experience in PCIe, DDR, Ethernet, USB, SPI etc. As a Staff Hardware Engineer , you will work on Machine Learning/AI hardware systems projects to craft the… more
    Google (05/07/25)
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  • Test Security Engineer , Silicon

    Google (Mountain View, CA)
    …with respect to Test and Product Engineering activities. you will work with ASIC Architecture, Design, Pre-silicon SOC Verification to implement secure end to ... delivering unparalleled performance, efficiency, and integration. As a Test Security Engineer , you will help integrate SOC technologies into mobile phones, tablets… more
    Google (05/04/25)
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  • Senior VLSI CAD Engineer

    NVIDIA (Santa Clara, CA)
    …a lasting impact on the world! We are currently looking for a Senior CAD engineer to join ou r team of dedicated engineers developing the custom circuits that help ... chance to create novel flows for circuit design and verification to help expedite chip development . What you...and Monte Carlo simulations. + Previous work in VLSI, ASIC , Circuit Design or EDA is a definite plus.… more
    NVIDIA (05/02/25)
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  • Senior Digital Circuit Design Engineer

    NVIDIA (Santa Clara, CA)
    We are now hiring for a Senior Logic and Digital Circuit Design Engineer ! NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in ... you'll be doing: + You will be working with ASIC controller teams to define a unified interface +...in RTL for mixed-signal blocks; Experience with industry standard verification methodologies, such as UVM + Proven experience with… more
    NVIDIA (04/30/25)
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  • Senior System Software Engineer - QNX BSP…

    NVIDIA (Santa Clara, CA)
    We have an exciting opportunity for a talented Senior System Software Engineer to join our dynamic Automotive Team and help us develop innovative, secure, and ... + Development & bring-up activities for next-generation Tegra SOC + Work with the ASIC teams to enhance SW performance and virtualization support in the SOC +… more
    NVIDIA (04/24/25)
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  • Lead C++ Software Engineer

    Cadence Design Systems, Inc. (San Jose, CA)
    …area. + Ideally you are a solid contributor in the FPGA or ASIC prototyping/synthesis/ verification space and have delivered great QoR on these platforms. ... impact on the world of technology. We are looking for an exceptional C++ software engineer to join the Protium Software Development Team to d evelop and enhance the… more
    Cadence Design Systems, Inc. (04/01/25)
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  • Senior Design for Debug Architect and Methodology…

    NVIDIA (Santa Clara, CA)
    …logic analyzers and/or other silicon visibility tools. + Great understanding of ASIC design flow including RTL design, verification , logic synthesis, timing ... a Senior Design for Debug (DFD) Architect and Methodology Engineer ! NVIDIA is seeking a DFD Architect to implement...at NVIDIA. + Work closely with software, architecture, design, verification , and silicon validation teams. + Train and mentor… more
    NVIDIA (03/13/25)
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  • R&D Engineer Physical Design

    Broadcom (San Jose, CA)
    …global teams and thriving in dynamic environments. Hands-on expertise with Physical verification and place-and-route tools for ASIC /SoC design is essential ... you apply.** **Job Description:** Broadcom is looking for a Design Implementation Engineer with demonstrated expertise in key areas such as synthesis, floor… more
    Broadcom (03/04/25)
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  • HAPS Engineer

    Insight Global (Sunnyvale, CA)
    …Minimum 8-10 years of experience in Simulation, Emulation, Prototyping or ASIC design/ verification using SystemVerilog/Verilog/VHDL required. A knowledge of HAPS ... Description The job responsibilities involve analysis of customers current verification methodology, deployment of Emulation and/or Prototyping solutions involved… more
    Insight Global (05/16/25)
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  • Senior Mask Layout Design Engineer

    NVIDIA (Santa Clara, CA)
    Are you a Mask Layout Design Engineer who is seeking am amazing opportunity? We are looking for a Senior Mask Layout Design Engineer - someone who is excited to ... CMOS technologies using Cadence tools + You'll work with ASIC and mixed-signal engineers to customize designs for integration...+ Experience running and debugging DRC and LVS with verification tools such as Dracula, Hercules, Calibre, Primeyield +… more
    NVIDIA (05/15/25)
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