• Digital FPGA Engineer Level 3 (AHT)

    Northrop Grumman (Acton, CA)
    …**Digital FPGA Engineer ** **Level 3** with the desire to learn new technologies to join our innovative Digital Technologies Organization to help develop, ... the moon. We look for people who have bold new ideas, courage and a pioneering spirit to join...cutting edge products and systems. As a Digital FPGA Engineer at Northrop Grumman, you will have a challenging… more
    Northrop Grumman (10/29/25)
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  • Hardware Engineer II (Co-op) - United…

    Cisco (San Jose, CA)
    …to high volume manufacturing. Creative Hardware Engineering positions are available in: + ASIC Design and Verification + System/Board Design + Circuit Board ... of computers and networking and take it to a new level in any one of the following product...power electronics, or embedded system design. + Knowledge of FPGA/ ASIC design flow and basic understanding of VHDL/Verilog is… more
    Cisco (11/14/25)
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  • Senior Hardware Systems Design Engineer

    Google (Sunnyvale, CA)
    …product teams to ensure that goals are met with systems and will work with ASIC /FPGA, software, and verification teams to ensure proper verification of ... Senior Hardware Systems Design Engineer , Board and Systems _corporate_fare_ Google _place_ Sunnyvale,...and validate products. + Lead the bring up, validation, New Product Introduction (NPI), deployment, and sustainment of hardware… more
    Google (10/30/25)
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  • Staff Hardware Systems Design Engineer

    Google (Sunnyvale, CA)
    …Product teams to ensure that goals are met with systems and will work with ASIC /FPGA, Software, and Verification teams to ensure proper verification of ... Staff Hardware Systems Design Engineer , Board and Systems _corporate_fare_ Google _place_ Sunnyvale,...and product validation. + Lead the bring up, validation, New Product Introduction (NPI), deployment, and sustaining of hardware… more
    Google (10/22/25)
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  • Hardware Engineer - FPGA

    Cisco (Milpitas, CA)
    …with a fully unified routing and switching portfolio. **Your Impact** The FPGA Engineer will get to work with cutting edge, next generation routers powering AI ... team that designs control path FPGAs for the various boards. The Engineer will interface with diagnostics, software, board design, manufacturing and hardware… more
    Cisco (11/13/25)
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  • Lead C++ Software Engineer

    Cadence Design Systems, Inc. (San Jose, CA)
    …team of super star engineers to develop our next generation FPGA based verification platform. Responsibilities: + Implement new algorithm and enhancements in ... technology. We are looking for an exceptional C++ software engineer to join the Protium Software Development Team to...you are a solid contributor in the FPGA or ASIC prototyping/synthesis/ verification space and have delivered great… more
    Cadence Design Systems, Inc. (09/30/25)
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  • Senior Applications Engineer - DDR Design…

    Cadence Design Systems, Inc. (San Jose, CA)
    …DDR4/5, LPDDR4/5/5X, HBM2/3, GDDR6* Perl/Python Scripts* Experience on memory subsystem verification and/or performance analysis* Strong knowledge of ASIC flow, ... who want to make an impact on the world of technology. Senior Applications Engineer - DDR Design IPJob Location: San Jose, CAJob DescriptionThe Cadence IP team… more
    Cadence Design Systems, Inc. (10/11/25)
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  • Senior FPGA Design Engineer

    Silvus Technologies (Irvine, CA)
    …real-world communication needs. The _Senior FPGA Design Engineer_ will be based at our new Silvus office, located in **_Irvine, CA_** . The position will be on a ... test bench development. + FPGA synthesis and timing closure. + Hardware verification and troubleshooting; familiarity with logic analyzers. + Provide support to the… more
    Silvus Technologies (11/17/25)
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  • Senior Mask Design Engineer - Hardware

    NVIDIA (Santa Clara, CA)
    …era of computing. NVIDIA is a "learning machine" that constantly evolves by adapting to new opportunities that are hard to take on, that only we can pursue, and that ... creativity and intelligence. Are you a Mask Layout Design Engineer ? If yes, We would love to hear from...using Cadence tools. + You'll work cross functionally with ASIC and mixed-signal engineers to customize designs for integration… more
    NVIDIA (11/13/25)
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  • Senior Mask Design Engineer - Hardware

    NVIDIA (Santa Clara, CA)
    …era of computing. NVIDIA is a "learning machine" that constantly evolves by adapting to new opportunities that are hard to take on, that only we can pursue, and that ... creativity and intelligence. Are you a Mask Layout Design Engineer ? If yes, We would love to hear from...technologies using Cadence tools. + You'll work multi-functional with ASIC and mixed-signal engineers to customize designs for integration… more
    NVIDIA (08/28/25)
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