• Senior CAD Engineer

    NVIDIA (Santa Clara, CA)
    …the company. What you'll be doing: + Collaborate across internal library, design-enablement, ASIC and physical design teams to develop and support VLSI Library ... quality library views + Architect, build, and maintain end-to-end VLSI library development flows for advanced nodes + Automate...least one of the areas below: + Understanding of VLSI design and place and route flows, CMOS processes,… more
    NVIDIA (06/05/25)
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  • CAD Flow Development Engineer

    NVIDIA (Santa Clara, CA)
    …impact on the world. Are you a computer engineer with a passion for automation of VLSI ASIC design? Be part of a diverse team creating NVIDIA's chip design ... and use advanced silicon processes. We're responsible for NVIDIA's front-end ASIC software including RTL synthesis, equivalence checking, and early physical design… more
    NVIDIA (07/25/25)
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  • Senior System Architect, GPU

    NVIDIA (Santa Clara, CA)
    …architecture specification, working with multi-functional teams in the organization including ASIC design, software, and VLSI to explore architecture trade-offs, ... We are seeking a motivated system architect with an understanding of architecture, ASIC design and verification flow to help define system architecture. Your role… more
    NVIDIA (07/22/25)
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  • Sr. Design Verification Manager, Annapurna Labs

    Amazon (Cupertino, CA)
    …and rapid integration of emergent technologies. We're looking for an ASIC Design Eengineer to help us trail-blaze new technologies and architectures, while ... professional. Basic Qualifications - 8+ years of hands-on experience in ASIC / VLSI design verification, with a strong understanding of verification methodologies… more
    Amazon (05/17/25)
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  • Senior Timing Methodology Engineer

    NVIDIA (Santa Clara, CA)
    …aging, self-heating, thermal impact, IR drop etc. + Collaborate with technology leads, VLSI physical design, and timing engineers to define and deploy the most ... experience) in Electrical or Computer Engineering with 3 years' experience in ASIC Design and Timing. + Good understanding of modeling circuits for sign-off… more
    NVIDIA (07/19/25)
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  • Senior Software Engineer, CAD Tool Development

    NVIDIA (Santa Clara, CA)
    …highly motivated, and committed. Ways to stand out from the crowd: + Previous work in VLSI , ASIC , or EDA is a definite plus + Experience with design collaterals ... in Computer Science/Engineering or equivalent experience + 3+ years of experience in VLSI CAD flows and methodology + Good programming skills in multiple languages… more
    NVIDIA (07/22/25)
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  • DFT Engineer - CPU

    Qualcomm (Santa Clara, CA)
    …Debug) architecture, implementation, and test plans for both mixed signal and digital VLSI designs. Then you'll insure it becomes reality. We're doing a ground up ... years of practical experience + Strong fundamentals in digital ASIC design; experience using Verilog or VHDL + Experience...design; experience using Verilog or VHDL + Experience with ASIC test, DFT, and debug + 2+ years of… more
    Qualcomm (07/04/25)
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  • GPU Power Systems Engineer

    Qualcomm (San Diego, CA)
    …scripting in Python or Perl. + 5+ years of experience with low-power ASIC optimization **Preferred Qualifications:** + Master's or PhD degree or equivalent in ... advanced CPU/GPU architecture/microarchitecture design development + 8+ years of experience with VLSI design and verification + 8+ years of experience with low-power… more
    Qualcomm (06/03/25)
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  • Product Test Engineer

    Cisco (San Jose, CA)
    …are received.** **Meet The Team** As part of the team you will collaborate with ASIC design teams in the Central Hardware Group, peer Test and Product Engineers in ... Engineering (or equivalent experience) along with 8+ years' experience in SOC/ VLSI / bring-up, production, characterization, and test engineering. + Excellent working… more
    Cisco (07/29/25)
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  • Senior Mask Design Engineer - Hardware

    NVIDIA (Santa Clara, CA)
    …cross functionally with ASIC and mixed-signal engineers to customize designs for integration in VLSI products. + Take part in floor planning, custom layout ... and verifying against design rules and schematics. What we need to see: + Have a BSEE or equivalent experience with Minimum of 6+ proven experience in Mask and Layout Design. + Deep understanding of analog circuit layout concepts in submicron CMOS… more
    NVIDIA (07/24/25)
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