• Senior HSIO Validation Engineer

    NVIDIA (Santa Clara, CA)
    …+ Coordinate with logic design, circuit design, board design, Simulation, diagnostics, ATE , firmware, driver, and marketing teams to drive the chip into production. ... + Develop new methodologies to improve the silicon validation process, which will help meet upcoming performance, adaptability, and safety industry standards. + Ensure interoperability with connected devices and system components in sophisticated interconnect… more
    NVIDIA (08/28/25)
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  • Lead ASIC DFT Engineer

    Google (Mountain View, CA)
    …+ Develop tests that can be used for production in the Automatic Test Equipment ( ATE ) flow. + Work with junior members of the DFT team to deliver overall ... deliverables for two or more subsystems in a System on a Chip (SoC). + Responsible for overall DFT execution right from architecture phase to design, front-end and back-end implementations, gate level simulations and post-silicon debug. Google is proud to be… more
    Google (08/27/25)
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  • Lead Test Engineer

    Actalent (San Diego, CA)
    …testing, shock testing, and vibration testing + Knowledge in configuration of ATE components including rack instrumentation and PXI architectures. + Ability to ... demonstrate engineering principles and concepts. + Ability to read code in Python and C#. + Ability to read schematic drawings using Altium Designer. + Solid analytical and problem-solving skills. + Proficient in Microsoft Office products (Word, Excel,… more
    Actalent (08/21/25)
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  • Manufacturing Engineer , Product Operations

    Google (Sunnyvale, CA)
    …+ Experience with Python/SQL scripting. + Understanding of CMOS devices, fabrication processes, ATE test, DFT, quality, and reliability. Be part of a team that ... pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware… more
    Google (08/15/25)
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  • Senior Mixed Signal Design Engineer

    NVIDIA (Santa Clara, CA)
    …in silicon bringup, build scripts that can be used for debug, QA, characterization and ATE What we need to see: + BS or MS degree in Electrical Engineering or ... equivalent experience + 12+ year of experience demonstrated ability working in high-speed I/O digital design, knowledge at protocol level (SATA, PCIE, USB) preferred + Have a deep understanding of Verilog or SystemVerilog, logic design and circuit modeling for… more
    NVIDIA (08/08/25)
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  • DFT Design Engineer , AWS Machine Learning…

    Amazon (Cupertino, CA)
    …Verification * Participate in Silicon debug and write scripts to effectively handle ATE related data * Communicate and work with team members across multiple ... disciplines About the team Why AWS Amazon Web Services (AWS) is the world's most comprehensive and broadly adopted cloud platform. We pioneered cloud computing and never stopped innovating - that's why customers from the most successful startups to Global 500… more
    Amazon (08/04/25)
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  • System Level Product Development Engineer

    NVIDIA (Santa Clara, CA)
    …spec validation + Partner with other engineering groups including ASIC, DFT, ATE , silicon validation, fab process, software and quality teams to coordinate efforts ... and resolve silicon issues + Initiate and drive process improvements/preventative actions through root cause analysis + The ideal candidate will always look to improve workflows, products, functions and methodologies while working multi-functionally to achieve… more
    NVIDIA (06/17/25)
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  • Senior Silicon Circuits System Design…

    NVIDIA (Santa Clara, CA)
    …designers, software/firmware engineers, HW/SW applications engineering, process/reliability specialists, ATE engineers, product managers, sales, and operations in a ... multifaceted, high-energy work environment to bring industry-defining products to market. What we need to see: + BS (or equivalent experience) with 12+ years experience in EE, CE, CS, Systems Engineering, or similar and experience in a related hardware… more
    NVIDIA (06/13/25)
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  • Senior Director, Engineering

    Skyworks (Newbury Park, CA)
    …methodologies and checklists at each module phase (Architecture/DEV/P0/P1) + Drive periodic ATE and FI yield and coverage reviews at each module phase (DEV/P0/P1) ... + Ensure early comprehensive ATE coverage + Drive to 100% coverage of customer...###@skyworksinc.com. Nearest Major Market:VenturaNearest Secondary Market:Oxnard Job Segment: RF Engineer , Electrical Engineering, Front End, Test Engineer ,… more
    Skyworks (07/06/25)
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  • Test Engineering/SW Co-Op (Winter/Spring 2026)

    Skyworks (Irvine, CA)
    …software tools that accelerate the development of test programs for Automated Test Equpiment ( ATE ) + Work with engineers to understand the best workflow and how best ... time + You will be tasked with validating the software output on ATE platforms. Driving the tester, analyzing the data against released software and iterating… more
    Skyworks (08/13/25)
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