• Principal Engineer MLOps (DLP Detection)

    Palo Alto Networks (Santa Clara, CA)
    …great outcomes. **Your Career** We are looking for a Principal MLOps Engineer to lead the design, development, and operation of production-grade machine learning ... is located at our dynamic Santa Clara California headquarters campus, and in office 3 days a week. Not a remote role.** **Your Impact** + Lead MLOps architecture:… more
    Palo Alto Networks (10/02/25)
    - Related Jobs
  • FPGA Digital Design Engineer 3 /4

    Northrop Grumman (Los Angeles, CA)
    …Northrop Grumman Advanced Weapons has an opening for a FPGA Digital Design Engineer with an active clearance, to join our team of qualified, diverse individuals. ... with 5 years of digital verification engineering experience using industry standard simulation tools; 3 years with an MS degree; 0 years with PhD. . Must have hands… more
    Northrop Grumman (09/27/25)
    - Related Jobs
  • Principal Systems Engineer

    Ford Motor Company (Palo Alto, CA)
    …sustainable material by 2025. **What you'll be able to do:** Principal Systems Engineer - positions offered by Ford Motor Company (Palo Alto, California). Note, this ... or related field and 8 years of experience in the job offered or related occupation. 3 years of experience with each of the following skills is required: 1. C++ and… more
    Ford Motor Company (09/25/25)
    - Related Jobs
  • Senior Systems Engineer

    G2 Ops, Inc. (El Segundo, CA)
    …ways for every role-technical and operational-to harness AI effectively. From engineering automation to proposal generation and risk modeling, G2 Ops is embedding AI ... For this opportunity, we are seeking a highly motivated, team-oriented Senior Systems Engineer . This exciting position will have the chance to work on just about… more
    G2 Ops, Inc. (09/23/25)
    - Related Jobs
  • Senior IP Verification Engineer

    NVIDIA (Santa Clara, CA)
    We are now looking for a Senior Verification Engineer ! NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. ... and UVM + Build testbenches and enhance flows for automation of unit level trace based testing against reference...range is 136,000 USD - 212,750 USD for Level 3 , and 168,000 USD - 264,500 USD for Level… more
    NVIDIA (09/23/25)
    - Related Jobs
  • Advanced Robotics Electrical Engineer

    Amazon (San Francisco, CA)
    Description About the Role: We are seeking a hands-on Electrical Engineer to lead the design and integration of electrical systems for high-degree-of-freedom robotic ... * Bachelor's or Master's in Electrical Engineering or a related field. * 3 + years experience designing and integrating electrical systems in robotics or complex… more
    Amazon (09/20/25)
    - Related Jobs
  • PMW 160 Futures Capabilities WAN Engineer

    SOLUTE Careers (San Diego, CA)
    Sigma Defense is currently seeking a PMW 160 Futures Capabilities WAN Engineer to support the design of Navy networks. Specifics tasks include: Development of ... Agency and the specific LCAT requirements the candidates is proposed under. + 3 + years of experience developing technical documentation. + Proven track record of… more
    SOLUTE Careers (09/18/25)
    - Related Jobs
  • Senior ASIC Design Verification Engineer

    NVIDIA (Santa Clara, CA)
    NVIDIA is seeking a hardworking Senior ASIC Design Verification Engineer to help drive sign-off strategies for world's leading GPUs and SoCs. This position offers ... sub-system level verification or MS preferred in Electrical, Computer Engineering with 3 + years' experience in unit level or sub-system level verification. +… more
    NVIDIA (09/04/25)
    - Related Jobs
  • Software QA Engineer

    Broadcom (San Jose, CA)
    …other software / firmware teams to design and execute performance and scale testing. 3 . Hands-on in test planning, automation and validation of RDMA protocol ... join the NIC product team. As a Software QA Engineer , you will be responsible for validation of the...and Data center Networking, and firmware development and testing. 3 . A good understanding of the RDMA protocol is… more
    Broadcom (08/30/25)
    - Related Jobs
  • Senior ASIC Physical Design and Timing…

    NVIDIA (Santa Clara, CA)
    …human inventiveness and intelligence. We are now looking for a motivated ASIC Timing Engineer to join our dynamic and growing team. If you want to challenge yourself ... Experience in methodology and/or flow development as well as automation . NVIDIA is widely considered to be the leader...range is 136,000 USD - 212,750 USD for Level 3 , and 168,000 USD - 264,500 USD for Level… more
    NVIDIA (11/22/25)
    - Related Jobs