- BAE Systems (San Diego, CA)
- …may be available based on position level and/or job specifics. **Senior Principal Design Verification Engineer - FPGA - (Sign-on Bonus)** **113449BR** EEO Career ... **Job Description** Picture yourself developing advanced electronic systems deployed to protect members of our armed...career. BAE is looking for experienced senior level FPGA Design Verification Engineers who can plan, architect, and develop… more
- NVIDIA (Santa Clara, CA)
- …work, to amplify human creativity and intelligence. NVIDIA is looking for motivated System /Board Design Validation Engineers to use your creativity to work on ... the highly inventive team. What you'll be doing: + System /board level debug and validation of NVIDIA 's products...functional check, debug and build reports. + Work with design engineers, software engineers, program manager, silicon design… more
- Meta (Sunnyvale, CA)
- …implementation to firmware development and system software, demonstrated fundamentals in digital design and C will enable you to contribute to all phases of ... **Summary:** We are looking for an experienced digital design engineer to support our Reality...design (PD) through STA and SDCs 4. Develop system tests in C for custom hardware… more
- Northrop Grumman (San Diego, CA)
- …of the following Systems Engineering activities: system requirements decomposition/derivation/flow down/traceability, architecture, high-level/detail design , ... more of the following Systems Engineering activities: system requirements decomposition/derivation/flow down/traceability, architecture, high-level/detail design ,… more
- Meta (Menlo Park, CA)
- …creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and implement block/IP/ System on ... **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure...C ++ based verification 8. 3+ years experience in block/IP/sub- system and/or SoC level verification based on SystemVerilog UVM/OVM… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design ... On Chip (SoC) for data center applications. As a Design Verification Engineer , you will be part...C ++ based verification 10. 8+ years experience in IP/sub- system and/or SoC level verification based on SystemVerilog UVM/OVM… more
- Meta (Menlo Park, CA)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design ... On Chip (SoC) for data center applications.As a Design Verification Engineer , you will be part...C ++ based verification 10. 12+ years experience in IP/sub- system and/or SoC level verification based on SystemVerilog UVM/OVM… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design ... On Chip (SoC) for data center applications.As a Design Verification Engineer , you will be part...will be responsible for the verification closure of a design module or sub- system from test-planning, UVM… more
- Capgemini (Santa Clara, CA)
- …SPI, I2C, JTAG + Power system design + Experienced with defining system specifications for hardware systems and creating and executing a test plan + ... You're Considering** + Test and bring-up FPGA and CPU based boards and systems + Review system specification documents for architecture, electrical, power… more
- Amazon (Sunnyvale, CA)
- …that is powering the latest generation of Echo devices is looking for a Senior Design Verification Engineer to continue to innovate on behalf of our customers. ... test plans for verification of the full chip or sub- system by working with design engineers and...as CPU, NPU, and SOC. Drive Verification Methodology using System Verilog / C ++ based test benches.… more