• High-Performance Computing Systems

    Texas A&M University System (Kingsville, TX)
    …advanced technical support for using HPC systems . Essential Duties and Responsibilities System Architecture and Design + To meet research needs, design ... Job Title High-Performance Computing Systems Engineer Agency Texas A&M University...+ Ensure we are aligned with our campus and system policies and rules. + Design , test,… more
    Texas A&M University System (02/19/25)
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  • Senior Design Verification Engineer

    BAE Systems (Austin, TX)
    …incentives may be available based on position level and/or job specifics. **Senior Design Verification Engineer - FPGA** **110463BR** EEO Career Site Equal ... **Job Description** Picture yourself developing advanced electronic systems deployed to protect members of our armed...advancing your career. BAE is looking for experienced FPGA Design Verification Engineers who can develop and use verification… more
    BAE Systems (03/06/25)
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  • Design Verification Engineer - FPGA…

    BAE Systems (Austin, TX)
    …Other incentives may be available based on position level and/or job specifics. ** Design Verification Engineer - FPGA - (Sign-on Bonus)** **110460BR** EEO Career ... **Job Description** Picture yourself developing advanced electronic systems deployed to protect members of our armed...career. BAE is looking for experienced senior level FPGA Design Verification Engineers who can plan, architect, and develop… more
    BAE Systems (03/06/25)
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  • Principal / Senior Principal Cybersecurity…

    Northrop Grumman (San Antonio, TX)
    …of the following Systems Engineering activities: system requirements decomposition/derivation/flow down/traceability, architecture, high-level/detail design , ... more of the following Systems Engineering activities: system requirements decomposition/derivation/flow down/traceability, architecture, high-level/detail design ,… more
    Northrop Grumman (04/08/25)
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  • Electrical Design Engineer 2

    Safran (Gainesville, TX)
    Electrical Design Engineer 2 Company : Safran Seats Job field : Electrical and mechatronics Location : Gainesville , Texas , United States Contract type : ... and system block diagrams. B) Understands basic AC/DC theory C ) Communicates effectively with multiple organizations including a customer on projects D)… more
    Safran (04/10/25)
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  • Sr. Principal Design verification…

    Cadence Design Systems, Inc. (Austin, TX)
    …in Processor based full chip verification / IP Verification Knowledge of Verilog/ System Verilog, digital simulation and debug Knowledge of HS/LS Protocols / ... Processor based SOC architecture and digital design fundamentals Skilled in many aspects of digital verification...formal / Power Aware Simulations / GLS Experience with C / C ++. Debugging disassembly assembly is a plus… more
    Cadence Design Systems, Inc. (05/06/25)
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  • ASIC Engineer , Design Verification

    Meta (Austin, TX)
    **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design ... On Chip (SoC) for data center applications.As a Design Verification Engineer , you will be part...will be responsible for the verification closure of a design module or sub- system from test-planning, UVM… more
    Meta (05/06/25)
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  • ASIC Engineer , Design Verification

    Meta (Austin, TX)
    **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design ... On Chip (SoC) for data center applications.As a Design Verification Engineer , you will be part...C ++ based verification. 10. 10+ years experience in IP/sub- system and/or SoC level verification based on SystemVerilog UVM/OVM… more
    Meta (04/18/25)
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  • ASIC Engineer , Design Verification

    Meta (Austin, TX)
    **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design ... On Chip (SoC) for data center applications.As a Design Verification Engineer , you will be part...C ++ based verification 10. 14+ years experience in IP/sub- system and/or SoC level verification based on SystemVerilog UVM/OVM… more
    Meta (03/20/25)
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  • ASIC Engineer , Design Verification

    Meta (Austin, TX)
    **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design ... On Chip (SoC) for data center applications.As a Design Verification Engineer , you will be part...will be responsible for the verification closure of a design module or sub- system from test-planning, UVM… more
    Meta (03/09/25)
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