• RF & Microwave Design Engineering Manager

    Teledyne (Mountain View, CA)
    …VSS). + Design of RF components using ADS, MWO, HFSS, Sonnet, Spice or Cadence . + Evaluation and selection of devices appropriate to the applications and meeting the ... Experience with design tools such as MWO, ADS, HFSS, Sonnet, Spice, or Cadence . + Knowledge of signal routing and packaging technologies for devices and… more
    Teledyne (12/31/25)
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  • Senior Electronics & Semiconductor Engineer

    Capgemini (San Francisco, CA)
    …IC design teams. + Support and enhance design flows using tools from ** Cadence , Synopsys, Mentor, Keysight, Ansys** , and others. + Develop and maintain automation ... years of experience in **CAD engineering** for IC design. + Proficiency in ** Cadence Virtuoso** , **Calibre DRC/LVS** , and other industry-standard tools. + Strong… more
    Capgemini (12/30/25)
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  • Sr. RF Design Engineer

    Teledyne (Mountain View, CA)
    …tools (VSS) + Design RF components using ADS, MWO, HFSS, Sonnet, Spice, or Cadence + Evaluate and select devices such as LNAs, PAs, filters, mixers, and synthesizers ... + Proficiency with RF design tools such as ADS, MWO, HFSS, Sonnet, or Cadence (required) + Strong lab skills and ability to tune and align circuitry (required)… more
    Teledyne (12/30/25)
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  • Principal, AI Strategy & Operations Program…

    Microsoft Corporation (Mountain View, CA)
    …Strategy team, within the Office of the CEO of MAI, to run decision cadence and operations for MAI's model development, align cross functional execution, and deliver ... translate them into recommendation memos for leadership. + Drive decision cadence and governance organizing and facilitating high‑impact forums (eg, model strategy… more
    Microsoft Corporation (12/24/25)
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  • Package Design Engineer

    Google (Sunnyvale, CA)
    …experience. + 4 years of experience in chip package substrate design using Cadence APD (Allegro Package Designer) or mentor expedition. + Experience in chip package ... Package Outline Drawings (POD). + Ability to write scripts to customize elements of the cadence or mentor workflow. **About the job** Be part of a team that pushes… more
    Google (12/20/25)
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  • Senior Technical Program Manager II, Core

    Google (Sunnyvale, CA)
    …of the respective organization. + Establish a reliable and visible cadence for portfolio reviews, decision making, prioritization, and resource management, whereby ... program portfolio including direct influence over resourcing decisions, planning cadence , and planning stakeholders. Information collected and processed as part… more
    Google (12/20/25)
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  • Technologist - Analog/Mixed-Signal CAD Development…

    Western Digital (San Jose, CA)
    …validation and customer support + Automation and Utilities development in Cadence SKILL/SKILL++ Development of Calibre/Pegasys Physical Verification decks for CMOS ... extraction, Calibre, starRC, ICV etc. + **Software Development Flows and Scripting:** Cadence Skill, Calibre SVRF/TVF, Python, Shell + **PDK:** Deep knowledge of PDK… more
    Western Digital (12/19/25)
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  • Hardware Engineering Technical Leader

    Cisco (Milpitas, CA)
    …and from qualification to final product release to our customers. + Use Cadence /Allegro to develop schematics and oversea layout and routing of complex PCB designs ... high speed design and/or signal integrity. + Experience with design tools such as Cadence Concept and/or Allegro + Experience with lab bring up, debug and design… more
    Cisco (12/16/25)
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  • Senior Manager of Sales Operations - OEM

    McAfee, Inc. (San Jose, CA)
    …relocation assistance at this time. **_About the Role:_** + Run the cadence : Lead weekly forecasts, growth meetings (EGR), and team calls-set agendas, secure ... Strategy, or Program Management roles. + Proven ability to run operating cadence (forecast calls, pipeline reviews, QBRs/EGRs, exec meetings) with precision and… more
    McAfee, Inc. (12/11/25)
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  • Hardware Engineer

    Insight Global (San Jose, CA)
    Job Description Responsibilities include: Write hardware specs, develop test plans Use Cadence /Allegro to capture schematics Bring up hardware with ASIC teams Debug ... and FPGAs Hands on board design knowledge, familiar with design tools including Cadence Concept and Allegro Knowledge of scripting languages like python, perl is a… more
    Insight Global (12/09/25)
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