- NVIDIA (Santa Clara, CA)
- …data from lab measurements and/or modelling tool/methodology updates. + Substrate and board layout SI guidelines creation, review and post layout SI extractions. ... VNA, TDR, DSO, ParBERT and use of tools/applications like ADS, Ansys Designer, JMP, Matlab, Cadence Allegro will be a plus. Ways to stand out from the crowd: +… more
- NVIDIA (Santa Clara, CA)
- …operation, and DRC/DFM impact + Circuit Design: Transistor-level circuit design, layout implementation, physical and logical verification, and debug of SRAM macros ... preferred + 10+ years of SRAM design experience with strong background in layout , process understanding, and DRC rules on advanced FinFET processes + Prior design… more
- NVIDIA (CA)
- …defining the chip pad ring, substrate interconnect scheme, and lead the package layout design process. + We collaborate with large teams consisting of Circuit, ... Signal Integrity, RTL, Place and Route, substrate layout and system design Engineers and Managers. + Work...programming and scripting skills in Perl, Python, Tcl desired, Cadence Skill and EXCEL familiarity are helpful. + Enthusiastic… more
- NVIDIA (Santa Clara, CA)
- …design activities, PCB stack up design, material selection, design guide implementation, layout review, and post- layout analysis. + System-level signal integrity ... HFSS, Sigrity, Hspice or similar industry standard simulation tools + Experienced with Cadence Allegro PCB designer and Constraints Manager and or other PCB stack up… more
- Fresh Consulting (Sunnyvale, CA)
- …and PCB layout through assembly. - Experience with Altium or Cadence design tools. - Experience working with firmware/software teams to define and implement ... Experience leading and driving design development from schematic capture, and PCB layout through assembly. - Experience with programming in C/C++ for development,… more
- NVIDIA (Santa Clara, CA)
- …include defining the chip pad ring, substrate interconnect scheme, and lead the package layout design process for package test vehicles + The focus will be primarily ... + Strong programming skills (Perl, Python, Tcl desired) + Working knowledge of Cadence Allegro Packaging Design (APD) + Experience in 2.5D packages + Strong problem… more
- Meta (Menlo Park, CA)
- …into production 13. 5+ years of experience with design tools for schematic, layout and simulation, such as Cadence , PCad, Mathcad, PSpice, or Simetrix/Simplis ... 14. 5+ years of experience with product bring-up and troubleshooting skills with power supply testing methodologies 15. 5+ years of experience developing design specifications, design guidelines, and test plans **Preferred Qualifications:** Preferred… more
- Amazon (Sunnyvale, CA)
- …synthesis place route clock construction - PPA Power Performance Area Optimization - Layout timing LEC verification - TCL, Python, PERL, or other scripting languages ... years in one or more of these tools: Design compiler, IC Compiler, Fusion Compiler, Cadence synthesis APR tool - Physical aspect of VLSI designs - Strong written and… more
- Snap Inc. (Los Angeles, CA)
- …team! What you'll do: + Own schematic design, circuit review, stackup definition and layout review for PCB, Flex and Rigid Flex designs + Test and validate ... developing consumer electronic devices + Experience with vendor communication + Experience with Cadence Orcad and Allegro If you have a disability or special need… more
- Amazon (Sunnyvale, CA)
- …necessary convergence for design and power convergence. * Provide recommendations for layout and design changes to enhance power distribution and minimize IR drop. ... * Experience with memory compiler * Experience with formal equivalence - Cadence Conformal/Synopsys Formality * Have in depth knowledge of entire design process… more