• Layout Engineer

    Broadcom (San Jose, CA)
    …degree and 3+ years of related experience + Strong interest in developing a career in IC layout . + Familiarity with Cadence layout tools. + Experience ... you apply.** **Job Description:** We are seeking a highly motivated and meticulous IC Layout Engineer, specializing in photonic IC layout . This role… more
    Broadcom (07/09/25)
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  • Senior Package Layout Engineer - Hardware

    NVIDIA (Santa Clara, CA)
    …Lead and different design teams in the design and development of sophisticated, detailed layout of IC substrates for NVIDIA products. In addition, work with ... Cadence APD or SiP tool suite. + Propose layout design trade-offs to the Technical Package Lead for...and flip chip packages, preferred + Significant background with Cadence APD or SiP and/or PCB layout more
    NVIDIA (07/10/25)
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  • Senior CAD Automation Engineer

    Capgemini (Irvine, CA)
    **About the Role You're Considering** The Integrated Circuit ( IC ) CAD Engineer - Analog Mixed-Signal Flow Automation position offers an exciting opportunity to work ... closely with IC design teams, providing critical support across PDK administration, layout design, verification flows, and automation scripting. This role is… more
    Capgemini (07/24/25)
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  • Sr. Staff CAD Engineer

    Power Integrations (San Jose, CA)
    …Develops and maintains PDKs.* Supports all IC design CAD tools such as Cadence schematic entry, mixed mode circuit simulation, layout design, layout ... software installation, license management, user support and vendor interface.* Works with IC layout designers providing support for taping out physical designs… more
    Power Integrations (07/24/25)
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  • AMS CAD/Analog Engineer

    Capgemini (Santa Clara, CA)
    **About the job you're considering** The Integrated Circuit ( IC ) CAD Engineer - Analog Mixed-Signal Flow Automation role at involves supporting IC design teams ... in various capacities, including PDK administration, layout design support, verification flow support, and scripting development...teams + Support design flows from EDA vendors like Cadence , Synopsys, Mentor, Keysight, Ansys, and others + Write… more
    Capgemini (07/24/25)
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  • Reliability Analog Design Engineer [Remote…

    Blue Cheetah Analog Design (CA)
    …designs in leading edge technologies * Work closely with the design team and the layout team to close the gap on any reliability violations * Coordinate with CAD and ... preferred) * Experienced expert in performing EM/IR analysis with Cadence Voltus and Voltus-XFi * Team player with the... Voltus * Knowledge and familiarity of fundamental analog IC circuit blocks * CMOS design experience in 28nm… more
    Blue Cheetah Analog Design (07/09/25)
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  • Principal, Design Engineering - Power

    Celestica (San Jose, CA)
    …interfaces, NPUs, FPGAs, High speed memory (DDR4/DDR5) and high-speed PCB layout . You will work with design, software/firmware, mechanical and thermal engineers. ... create and maintain the preferred list + DC relevant IC selection, create and maintain the preferred list +...except PSU. Base on specific requirement, including schematic and layout design + Architecture Lead and contribute to power… more
    Celestica (05/28/25)
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  • Senior CAD Engineer, Custom Circuit Designers

    NVIDIA (Santa Clara, CA)
    …used by custom schematic and mask designers + Write scripts using perl, python, and Cadence SKILL + We use a variety of standard off-the-shelf EDA tools at NVIDIA. ... responsible for supporting and maintain CAD tools used by IC designers including Virtuoso, IC -Manage, HSPICE, ADE,...+ A basic understanding of mosfet device behavior, CMOS layout , and VLSI design + Excellent programming skills +… more
    NVIDIA (06/05/25)
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  • Senior ICV CAD Engineer

    NVIDIA (Santa Clara, CA)
    …would be responsible for supporting and maintaining CAD tools used by IC designers including Virtuoso, IC -Manage, DRC/LVS verification tools, extractions, and ... new process technologies. + Write scripts using perl and Cadence SKILL What we need to see: + BS...+ A basic understanding of mosfet device behavior, CMOS layout , and VLSI design. + Excellent programming skills; experience… more
    NVIDIA (06/03/25)
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  • ASIC CAD Manager, Kuiper Silicon

    Amazon (Sunnyvale, CA)
    …scripting languages - 2+ years in one or more of these tools: Design compiler, IC Compiler, Fusion Compiler, Cadence synthesis APR tool - Physical aspect of VLSI ... an opportunity to shape the technical direction of critical IC design workflows and lead a team of skilled...clock construction - PPA Power Performance Area Optimization - Layout timing LEC verification - TCL, Python, PERL, or… more
    Amazon (07/31/25)
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