- Micron Technology, Inc. (Folsom, CA)
- …development of critical analog, mixed-signal, custom digital block, and full chip level integration support. + Perform verification like LVS/DRC/Antenna, quality ... their execution of Sub block-level layouts & review critical items. + Chip in to effective project-management. + Effectively communicating with Global engineering… more
- Amazon (Sunnyvale, CA)
- …Delivery Network and Standard Cell design. * Conduct detailed analysis of the PDN at Chip Top and block level to find and address potential IR (Voltage) drop issues ... Perl, Python, tcl, shell and drive to automate flows * Proficiency in chip front-end and back-end implementation tools such as Fusion compiler, Design Compiler, ICC2… more
- Cisco (San Jose, CA)
- …will work with Front-end RTL teams, backend physical design teams to understand chip architecture and drive DFT requirements early in the design cycle. **Key ... in collaboration with the multi-functional teams, and play a key role in full chip design integration with the testability features coordinated in the RTL. + Work… more
- NVIDIA (Santa Clara, CA)
- …we will all participate in establishing physical design methodologies, flow automation, chip floorplan, power/clock distribution, chip assembly and P&R, timing ... closure. + Craft designs for static timing analysis, power and noise analysis and back-end verification. What we need to see: + BSEE (MSEE preferred) or equivalent experience. + 5 years of experience in large VLSI physical design implementation on 5nm, 4nm and… more
- Teradyne (San Jose, CA)
- …and deployment of test solutions for Digital, High-Speed Digital, System on Chip , Mixed Signal and Analog semiconductor devices. + Test program software development, ... Product engineering experience in Digital, High-Speed Digital, High-Power Computing, System on Chip , Mixed Signal, or Analog testing and test development on ATE… more
- NVIDIA (Santa Clara, CA)
- …be doing: + Work in NVIDIA's semi-custom engineering team building customized chip solutions targeting data center/cloud, AI, self-driving, 5G, gaming, and consumer ... gaming, 5G, cloud, networking, and other spaces. + Work closely with architects, chip leads, and customers on SoC IP design, timing closure, power analysis,… more
- Google (Mountain View, CA)
- …efficient solutions that utilize system resources such as CPU and fabric in System on-a- chip (SoC), and ensure systems run smoothly to support key use cases. The ... solutions. + Analyze the utilization of the key component of System on a Chip (SoC) like Central Processing Unit (CPU), Graphics Processing Unit (GPU), and Fabric. +… more
- Google (Fremont, CA)
- …designers to understand design requirements and constraints. + Complete full chip integration and participate in foundry submission. Develop LVS/DRC/extraction flow ... for full chip as well as large analog modules. + Create and verify physical layouts for microLED display driver circuits, adhering to design rules and performance… more
- Capgemini (Santa Clara, CA)
- …a Design Verification Engineer, contributing to the validation of advanced System-on- Chip (SoC) designs that integrate embedded CPUs and analog mixed-signal ... coverage metrics from design specifications, and execute verification at both block and chip levels. + Automate environment setup and test generation using PERL and… more
- Amazon (San Diego, CA)
- …. Support the PostSi team to test the validation scripts on emulator. . Run chip level use case scenarios of complex blocks to ensure functional correctness . Work ... of Project Kuiper's sub-team responsible for defining and implementing the digital chip SOCs for communications via Low Earth Orbit satellites and Amazon gateways.… more