- Google (San Diego, CA)
- …solutions to our users. The team works to build Google's custom system-on- chip (SoC) that powers Pixel devices. Tensor makes transformative user experiences possible ... with the help of ML running on our Tensor Processing Unit (TPU) ML accelerator complemented by CPU and GPU subsystems to deliver the foundational mobile experiences. Google's mission is to organize the world's information and make it universally accessible and… more
- SanDisk (Milpitas, CA)
- …to drive design environment management and automation for Product and TEG chip development. This role is pivotal in developing and maintaining CAD workflows, ... creating automation scripts, and collaborating with cross-functional teams to improve design efficiency. ESSENTIAL DUTIES AND RESPONSIBILITIES: + **Design Automation:** + Develop and maintain Virtuoso and Customer Compiler interfaces and utilities using the… more
- Google (Mountain View, CA)
- …deliver overall deliverables for two or more subsystems in a System on a Chip (SoC). + Responsible for overall DFT execution right from architecture phase to design, ... front-end and back-end implementations, gate level simulations and post-silicon debug. Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color,… more
- NVIDIA (Santa Clara, CA)
- …do just that, for NVIDIA's software-defined networking products built on our Data-Center-on-a- Chip Architecture (DOCA). You will be among the very first to design ... systems for our next-generation SoC and take part in defining its role in the modern data center. Working and collaborating closely with some of the best and hardworking SDK developers, driver, firmware, and DPU architects, in the industry, as well as domain… more
- NVIDIA (Santa Clara, CA)
- …/ Performance estimation and optimization techniques. + Knowledge of energy efficient chip design fundamentals and related tradeoffs. + Familiarity with low power ... design techniques such as multi-VT, Clock gating, Power gating, and Dynamic Voltage-Frequency Scaling (DVFS). + Understanding of processors (GPU is a plus), system-SW architectures, and their performance/power modeling techniques. + Proficiency with Python and… more
- Google (Mountain View, CA)
- …and Android architecture. + Knowledge of computer architecture, mobile System on a Chip (SoC) architecture, and Machine Learning (ML) architecture. Be part of a team ... that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of… more
- Skyworks (San Jose, CA)
- …to the following: * Working with experienced engineers to validate/develop Multi- chip modules * Measuring RF module performance across supply, temperature, and ... frequency * Creating compliance matrices against spec, plotting results and analyzing data * Participating and presenting in data reviews * Performing lab testing using standard RF test equipment * Trouble-shooting and resolving test/bench or technical issues… more
- Google (Mountain View, CA)
- …to identify Chiplet technologies and select IPs for inhouse technology test chip development. + Drive requirements for Pre-silicon and Post-Silicon functional and ... DFT plans. + Work with the Post-Silicon Product Engineering team on Post-Silicon debug, leading to seamless execution from IP sourcing, integration to final post-Silicon verification. + Responsible for some inhouse IP development like Ring Oscillators and… more
- Google (Sunnyvale, CA)
- …the foundation of our SoCs (ie, security, clocking, reset, error handling, debug, chip management and SOC chassis, etc.). You will build a global understanding of ... how our accelerators are built from concept to production. In this cross-functional role, you will coordinate and co-design with our software and system hardware counterparts. The ML, Systems, & Cloud AI (MSCA) organization at Google designs, implements, and… more
- Microsoft Corporation (Mountain View, CA)
- …diverse and inclusive teams + Hands on expertise debugging silicon failures using on chip debug features (eg, trace or JTAG) as well as test equipment (eg, protocol ... analyzers, bit error rate testers, logic analyzers, high speed oscilloscopes) Hardware Engineering IC5 - The typical base pay range for this role across the US is USD $139,900 - $274,800 per year. There is a different range applicable to specific work… more