• Senior Package Layout Engineer - Hardware

    NVIDIA (Santa Clara, CA)
    …is a plus + Proven experience in substrate layout of wire bond and flip chip packages, preferred + Significant background with Cadence APD or SiP and/or PCB layout ... tools (including Constraint Manager) + Solid understanding of high-speed design signal integrity practices + Experience with Virtuoso and Calibre is a plus + Experience using Valor is helpful NVIDIA is widely considered to be one of the technology world's most… more
    NVIDIA (07/10/25)
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  • Speed Characterization Engineer

    NVIDIA (Santa Clara, CA)
    …and automotive solutions. What you will be doing: + Understand chip HW features and intersection with speed characteristics. Develop state-of-art ... characterization/validation strategies for these features. + Work in conjunction with senior engineers to prototype features on existing silicon and analyze the benefits of the feature. + Understand new silicon features and create internal characterization… more
    NVIDIA (07/10/25)
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  • Senior Microdisplay Architect, Raxium

    Google (Fremont, CA)
    …techniques, alternative circuit designs, pixel designs, and various full System-on-a- Chip (SoC) design alternatives. The architecture you develop will need ... to support a family of products and be exceptionally power and area efficient to cater to both low-end and high-end information glasses. Google's Raxium display group has established a revolutionary semiconductor materials display technology that enables new… more
    Google (07/09/25)
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  • Senior Silicon Product Definition Engineer

    NVIDIA (Santa Clara, CA)
    …to enable product shipment. + Work alongside system architects, chip and board designers, software/firmware engineers, HW/SW applications engineering, ... process/reliability specialists, ATE engineers, product managers, sales, and operations in a multifaceted, high-energy work environment to bring industry-defining products to market. What we need to see: + BS (or equivalent experience) with 8+ years or MS with… more
    NVIDIA (07/09/25)
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  • Senior ASIC Verification Engineer, Coherent High…

    NVIDIA (Santa Clara, CA)
    …of computing. To learn more about NVIDIA's ultra-fast chip interconnect technology visit: https://www.nvidia.com/en-us/data-center/nvlink-c2c/ What you'll be doing: ... + In this position, you will be responsible for verification of high-speed coherent interconnect design, architecture and golden models. + You will be responsible for micro-architecture using sophisticated verification methodologies. + As a member of our… more
    NVIDIA (07/09/25)
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  • ASIC Engineering Technical Leader

    Cisco (San Jose, CA)
    …degree on Electrical Engineering with at least 10 years of experience on ASIC chip design + Prior experience with RTL development on Asynchronous design + Prior ... experience on CDC/RDC concepts and relevant design implementation + Prior experience on maintaining CDC/RDC flow and signing-off constraints and waivers + Prior work with static glitch hazards and experience on the relevant analysis on synthesis optimized gate… more
    Cisco (07/09/25)
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  • Staff RFIC Design Engineer

    Skyworks (Irvine, CA)
    …+ General packaging knowledge on laminate, wire bonding, WLCSP, components, and multi- chip FEM considerations. + Understanding of RF systems and familiarity with ... wireless standards + Experience with lab measurements and familiarity with lab instruments including Network Analyzers, Spectrum Analyzers, Signal Generators, RF Probe Stations, Noise Figure Analyzers, and Load-pull Tuners. #LI-SJ1 The typical base pay range… more
    Skyworks (07/09/25)
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  • Silicon Performance, Power and Binning Tools…

    NVIDIA (Santa Clara, CA)
    …environment, we work alongside system architects, product definition engineers, chip and board designers, software/firmware developers, HW/SW applications engineers, ... and operations teams to bring industry-defining products to market. What we need to see: + BS or MS in EE, CE, CS, or Systems Engineering (or equivalent experience) + 4+ years of experience in a related hardware/software position + Excellent problem-solving,… more
    NVIDIA (07/09/25)
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  • Principal Electrical Engineer - RF Module

    Skyworks (Newbury Park, CA)
    …and transmitter chains. + Direct experience in PA, RF switches design or multi- chip module (MCM) design including filter and matching networks to support fully ... integrated front-end module designs. + Good understanding of various power amplifier topologies, linearity and efficiency enhancement techniques, active biasing and broadband techniques is essential. + Solid understanding of RF concepts such as impedance… more
    Skyworks (07/08/25)
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  • Principal Reliability/FA Engineer

    Skyworks (Newbury Park, CA)
    …We are looking for a highly skilled and experienced GaAs/Silicon Multi- Chip Module package/Assembly reliability Engineer to join New Technology Introduction (NTI) ... team. The successful candidate will be responsible for ensuring the reliability of MCM from design to packaging technology. This includes developing and implementing reliability tests, analyzing failure data, and collaborating with cross-functional teams to… more
    Skyworks (07/08/25)
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