• Packaging Engineer

    Texas Instruments (Santa Clara, CA)
    …concept to high volume manufacturing + Good understanding of clip attach, flip chip packaging and overview of wafer bumping processes + Knowledge of magnetics and ... high power density enterprise power modules (6V - 48V) is a plus + Strong knowledge of HV Bill of Materials (Mold compounds, Die Attach, DBC substrates, etc.) + Good understanding of industry & subcon HV packaging capabilities & roadmaps + Overview of high… more
    Texas Instruments (06/28/25)
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  • Senior Hardware Security Architect, Cryptographic…

    NVIDIA (Santa Clara, CA)
    …etc. + HSM operations + Certificate issuance, X509, etc. + Chip ATE test infrastructure and system/board manufacturing environments + post-Quantum cryptographic ... algorithms& standards. + Threat modeling, particularly in the context of dynamic manufacturing environments Ways to stand out from the crowd: + Experience with functional and Security testing ( fuzzing, negative testing, etc), test plan development, and… more
    NVIDIA (06/27/25)
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  • Senior Backend Engineer, Database and Systems…

    NVIDIA (Santa Clara, CA)
    …systems. The VLSI Productivity and Infrastructure team supports hundreds of chip design engineers by building internal tools and platforms that supercharge ... their everyday work. From build automation to machine learning, databases to web applications, and on-prem compute to cloud workloads, this team handles it all. More recently, GPU deep learning ignited modern AI - the next era of computing. NVIDIA is a… more
    NVIDIA (06/27/25)
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  • Senior Custom SOC IP Verification Engineer

    NVIDIA (Santa Clara, CA)
    …subsystems like ARM CPU complex, LPDDR, HBM, GPU's, DLA, PCIE or Network on chip and with performance verification Your base salary will be determined based on your ... location, experience, and the pay of employees in similar positions. The base salary range is 168,000 USD - 264,500 USD for Level 4, and 196,000 USD - 310,500 USD for Level 5. You will also be eligible for equity and benefits… more
    NVIDIA (06/27/25)
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  • Senior ASIC Verification Engineer

    Tarana Wireless (Milpitas, CA)
    …to define verification strategies and execute plans at system or full chip level + Build and continuously improve verification infrastructure and methodologies to ... meet the demands of next generation SoCs + Work with system architects, RTL designers, FPGA and emulation engineers to ensure that verification requirements and coverage are met for each project Ways you'll stand out from the crowd: + Ability to handle complex… more
    Tarana Wireless (06/26/25)
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  • Electrical Post Silicon Validation Engineer

    Cisco (San Jose, CA)
    …software in Python for hardware/ASIC testing. + Prior experience in chip -level, board-level and system-level hardware architecture. + Prior experience in Linux ... environment. **Preferred Qualifications:** + Prior experience with network processor and PHY testing. + High speed SERDES hardware or software experience. + Prior experience working with ATE teams and supporting silicon testing in production. + ASIC driver… more
    Cisco (06/25/25)
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  • Hardware Engineering Architect

    Cisco (San Jose, CA)
    …+ Your contribution will be at the center of the entire chip design process, enhancing simulation accuracy, performance, and multi-functional collaboration. + Define ... hardware feature specifications and develop their behavioral models + Present device features and architecture to internal and external customers and capture requirements for next-generation devices. + Guide the ASIC design and verification teams through the… more
    Cisco (06/25/25)
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  • Hardware Design Engineer 5

    ManpowerGroup (Mountain View, CA)
    …AI chips in development. + Gain deep insights into how complex IPs interact within a chip . + Be part of a high-impact team with a strong focus on innovation and ... technical excellence. + Enjoy a balanced work rhythm with 70-80% focus time and minimal meetings. If this is a role that interests you and you'd like to learn more, click apply now and a recruiter will be in touch with you to discuss this great opportunity. We… more
    ManpowerGroup (06/24/25)
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  • Sr. Manager, Product Management, Reference…

    Amazon (Sunnyvale, CA)
    …by tier and country - engagement models for product codevelopment - system-on- chip partnerships - performance and end-user satisfaction metrics - remote controls 3. ... Work closely with engineering leadership in Sunnyvale to deliver high-quality solutions 4. Drive operational excellence in reference solution development and deployment 5. Develop and maintain strong relationships with internal stakeholders and external… more
    Amazon (06/24/25)
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  • Machine Learning - Compiler Engineer II, AWS…

    Amazon (Cupertino, CA)
    …performance, stability and user-interface. You will work side by side with chip architects, runtime/OS engineers, scientists and ML Apps teams to seamlessly deploy ... state of the art ML models from our customers on AWS accelerators with optimal cost/performance benefits. You will have opportunity to work with open-source software (eg, StableHLO, OpenXLA, MLIR) to pioneer optimizing advanced ML workloads on AWS software and… more
    Amazon (06/21/25)
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