- NVIDIA (Santa Clara, CA)
- …feedback. + Driving new feature initiatives across multiple business units, converting chip and board level dI/dt analysis/mitigation techniques and board PDN design ... to enable product shipment. + Work alongside system architects, chip and board designers, software/firmware engineers, HW/SW applications engineering,… more
- NVIDIA (Santa Clara, CA)
- …needed for NVIDIA chips. + Participate in developing flow and tool methodologies for chip floorplan, power and clock distribution, chip assembly and P&R, timing ... 5 years experience in Physical Design Engineering + Familiar with aspects of chip design including Floor planning, Clock and Power distribution, Place and Route,… more
- NVIDIA (Santa Clara, CA)
- …power and noise analysis and back-end verification across multiple projects along with chip floorplan, power and clock distribution, chip assembly. + Extensive ... 5 years' experience in Physical Design Engineering + Familiar with aspects of chip design including Floor planning, Clock and Power distribution, Place and Route,… more
- NVIDIA (Santa Clara, CA)
- …high production-quality standards. This software engineering role involves developing high-level chip models, test APIs and trace generation workflows, and analysis ... + Improve the daily workflows of the world's top chip modelers and designers to help produce the next...as DirectX, CUDA, Vulkan or OpenGL + Experience with chip and/or system simulation + Deep understanding of systems… more
- NVIDIA (Santa Clara, CA)
- …of EC firmware with other platform firmware + Provide technical support to the EC Chip vendors and OEMs/ODMs + Partnering with the EC Chip vendors to ensure ... proper test tools and automation for qualifying firmware. + Develop collaterals for EC chip vendors and OEMs/ODMs What we need to see: + Bachelor's Degree or higher… more
- Amazon (Sunnyvale, CA)
- …used in Project Kuiper. This team partners with business team and performs chip level security testing, secure chip architecture design and advisory, system ... review, security review for Secure boot code, bootloader code and firmware. In this role, you will: *Help guide the secure development of devices at Amazon, from security design, threat modeling to code reviews, security testing and fuzzing *Propose, research… more
- Skyworks (San Jose, CA)
- …the following: * Working with experienced engineers to design/develop RF/Microwave multi- chip modules * Evaluating and optimizing prototypes of RF/Microwave multi- ... chip modules * Running simulations using design tools such as Ansys HFSS, Keysight ADS, etc. * Participating and presenting in design reviews * Performing lab testing… more
- Bristol Myers Squibb (Redwood City, CA)
- …co-cultures, organoids, human derived iPSC, primary cells, micropatterned 2D culture, tissue-on-a- chip , or other 3D models. + Design scalable assays with ... models, such as co-cultures, primary cells, human derived iPSC, organoids, 3D or tissue-on-a- chip , is required. + Hands-on experience with HCI or flow cytometer and… more
- Cisco (San Jose, CA)
- …design levels. You will collaborate with Front-end and Back-end teams to understand chip architecture and guide them in refining design and timing constraints for ... with 6+ years of ASIC or related experience. + Experience with block/full chip SDC development in functional and test modes. + Experience in Static Timing… more
- Meta (Sunnyvale, CA)
- …interconnect, cache, memory hierarchy analysis 2. Own Subsystem Network on Chip (NoC) architecture specification, design and characterization 3. Lead Intellectual ... correlation analysis 11. 1+ years of experience with System on Chip (SoC) Architecture, NoCs, memory subsystems, and heterogeneous compute principles **Preferred… more