- Broadcom (San Jose, CA)
- …apply.** **Job Description:** **Broadcom is looking for a senior level ASIC physical design engineer. In this highly visible role, you will be contributing to SerDes ... Computer Engineering with 6+ years of experience in Physical design .** + **Deep knowledge about industry standards in Physical... verification methodology to debug LVS/DRC issues at the chip and block level.** + **Experience with CDC, static… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is looking for a Senior Design Engineer for our Coherent High Speed Interconnect team! For two decades, NVIDIA has pioneered visual computing, the art and ... - the field has grown to encompass video games, movie production, product design , medical diagnosis, and scientific research! Today, we stand at the beginning of… more
- Broadcom (Irvine, CA)
- …not limited to, the following job duties: + Work as part of a physical design team implementing chips from netlist to GDSii with good understanding of the technology ... elements as well as design flow in all stages....physical verification. + Perform blocks IR/EM analysis. Experience with chip level IR/EM analysis is a big plus. +… more
- Broadcom (Irvine, CA)
- …Candidate Account, please Sign-In before you apply.** **Job Description:** **Memory Circuit Design Engineer** We are looking for energetic and passionate memory ... design engineers to join our Central Engineering Group and...is a plus + Understanding of DFT schemes and chip level integration is a plus + Familiarity with… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior Design for Debug (DFD) Architect and Methodology Engineer! NVIDIA is seeking a DFD Architect to implement hardware and software ... teams at NVIDIA. + Work closely with software, architecture, design , verification, and silicon validation teams. + Train and...improve GPU debuggability. + Help verify DFD hardware at full- chip level. What we need to see: + Bachelors… more
- Broadcom (San Jose, CA)
- …3nm and beyond Job Responsibilities: In this position you are responsible for 1. Design , RTL coding, and IP integration of key components like Digital Delay Lines, ... & integrate the developed IP 3. Ability to complete chip bring-up and lab measurement of designed elements 4....and verify. Job Requirements: 1. Excellent knowledge of Digital design is a must and it will be a… more
- SanDisk (Milpitas, CA)
- …will be responsible for designing, developing, modifying and evaluating Chip architecture and Core/Analog/Data Path circuit structures for feasibility study ... relevant experience. + Knowledge and/or experience in non-volatile memory design (NAND flash memory cell operation in particular) is...in particular) is a big advantage + A strong design & device background and experience with evaluating new… more
- Butler America (Sunnyvale, CA)
- …developing, testing, and integrating digital signal processing (DSP), high speed digital design , high speed communication and system-on- chip (SOC) implemented on ... FPGA Design /Verification Engineer Location: Sunnyvale, CA Job ID: #71390...and technical direction to junior engineers. Overall contribution to design , simulation, verification, integration & test of complex, high… more
- Skyworks (Irvine, CA)
- RF Design & Validation Co-Op (June '26 - Dec '26) Apply now " Date:Jul 31, 2025 Location: Irvine, CA, US Company: Skyworks If you are looking for a challenging and ... to the following: * Working with experienced engineers to validate/develop multi- chip modules * Measuring RF module performance across supply, temperature, and… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure organization to build cutting edge ASICs in fields such as machine learning, network ... IP for data center applications. **Required Skills:** ASIC Engineer, Design Responsibilities: 1. Architecture exploration 2. Micro-architecture development 3. RTL… more