- Broadcom (Irvine, CA)
- …PnR, timing closure, physical verification. + Perform blocks IR/EM analysis. Experience with chip level IR/EM analysis is a big plus. + Familiar with scripting ... languages such as tcl, perl and python. Write scripts to automate physical design flow and make it more efficient. + Expertise on low power IC design is desirable. + Good knowledge on physical verification using Mentor's Calibre tool. Minimum requirements:… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …the forefront of technology in the area of Electrical/Thermal/Mechanical Solution for Chip , package, PCB, 3DIC, and System. The primary responsibility is delivering ... product designs and project activities to meet customer expectations. Core Responsibilities: * Work within the Celsius PE team, focusing on thermal, electrical, and mechanical analysis * Support key customer engagements and local AEs to help drive business *… more
- SanDisk (Milpitas, CA)
- …datapath circuit design and page buffers. + Perform block level and full chip circuit simulations to meet all performance specifications. + RTL design, synthesis, ... static timing analysis and verification in verilog for page buffer and data path control logics. + Conduct silicon debugging and evaluation with micro-probing. + Collaborate with characterization engineers to fully characterize silicon, and partner with other… more
- NVIDIA (Santa Clara, CA)
- …develop, debug and deploy many functional aspects of NVIDIA hardware and mobile system-on- chip (SOC) devices! What you'll be doing: You can expect be heavily ... involved through all aspects of development of our world-class products, ranging up front from design feedback, early modeling, simulation of hardware in pre-silicon environments, all the way through to early silicon bringup and final feature deployment in… more
- NVIDIA (Santa Clara, CA)
- …environment, we work alongside system architects, product definition engineers, chip and board designers, software/firmware developers, HW/SW applications engineers, ... and operations teams to bring industry-defining products to market. What we need to see: + BS or MS in EE, CE, CS, or Systems Engineering (or equivalent experience) + 4+ years of experience in a related hardware/software position + Excellent problem-solving,… more
- Broadcom (San Jose, CA)
- …etc engineers to implement & integrate the developed IP 3. Ability to complete chip bring-up and lab measurement of designed elements 4. Ability to understand the ... analog or IP blocks used in the PHY at a functional level and verify. Job Requirements: 1. Excellent knowledge of Digital design is a must and it will be a bonus to have good understanding of Analog circuits or basic digital circuit design 2. Experience with… more
- NVIDIA (Santa Clara, CA)
- …systems. The VLSI Productivity and Infrastructure team supports hundreds of chip design engineers by building internal tools and platforms that supercharge ... their everyday work. From build automation to machine learning, databases to web applications, and on-prem compute to cloud workloads, this team handles it all. More recently, GPU deep learning ignited modern AI - the next era of computing. NVIDIA is a… more
- Amazon (Cupertino, CA)
- …solutions * Participate in various aspects of physical design: full chip floorplanning, circuit analysis, power/clock distribution, timing optimization, place and ... route, power integrity analysis, and physical verification * Write Tcl or PERL scripts to improve physical design flows and methods * Collaborate with RTL, DFT designers to ensure high quality design implementation Basic Qualifications Bachelors' degree or… more
- quadric.io, Inc (Burlingame, CA)
- …floor of a revolutionary new processor architecture. As a senior member of our chip design team, you will contribute to all stages of the processor design cycle. ... Requirements + Contribute to the definition of the processor architecture by understanding its applications + Own microarchitecture definition & RTL implementation of the processor in SystemC or SystemVerilog + Own Power, Performance & Area (PPA) optimization… more
- Amazon (Cupertino, CA)
- …optimization of custom silicon in our data centers. Key job responsibilities - verify custom chip designs at the SOC level - integrate 3rd party IPs and VIPs into ... the SOC testbench - create comprehensive testplans, write robust random testcases, and execute coverage plans - maintain autosmoke and regression infrastructure - dive deep into bugs and triages - mentor junior engineers Basic Qualifications - BS Degree or… more