• Embedded Optical Controls Engineer

    General Atomics (San Diego, CA)
    …successful candidate will report to the EE Instrumentations and Control Team Manager and, alongside high-caliber staff, will be engaged in the engineering support ... using high-performance devices such as the Zynq Ultrascale+ Multi-Processor System-on- Chip (MPSoC) using Xilinx Vivado/Vitis Design Suite. + Desired Experience:… more
    General Atomics (07/18/25)
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  • Senior Package Layout Engineer - Hardware

    NVIDIA (Santa Clara, CA)
    …is a plus + Proven experience in substrate layout of wire bond and flip chip packages, preferred + Significant background with Cadence APD or SiP and/or PCB layout ... tools (including Constraint Manager ) + Solid understanding of high-speed design signal integrity practices + Experience with Virtuoso and Calibre is a plus +… more
    NVIDIA (07/10/25)
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  • SDC Engineer (eInfochips Inc)

    Arrow Electronics (San Jose, CA)
    …with 5+ years of ASIC or related experience. + Experience with **block/full chip SDC development** in functional and test modes. + Experience in **Static Timing ... + Experience with constraint analyzer tools such as **TCM (Timing Constraint Manager from Synopsys)** and CCD (Conformal Constraint Designer from Cadence) +… more
    Arrow Electronics (06/06/25)
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