- NVIDIA (Santa Clara, CA)
- …systems are architected and built, has intimate knowledge of digital design, and understands chip development cycles, this is your place to be. What You'll Be Doing: ... + Drive day to day execution of chip architecture for NVIDIA's innovative NVLink Fusion platform +...on groundbreaking products with a dedicated team! Your base salary will be determined based on your location, experience,… more
- SpaceX (Sunnyvale, CA)
- …at the technical level, and will work with RFIC/mixed signal designers on full chip layout of custom analog and RFIC designs. RESPONSIBILITIES: + Work with the ... integrated circuit designers and chip leads to determine the chip floor...$140,000.00 - $190,000.00/per year Your actual level and base salary will be determined on a case-by-case basis and… more
- NVIDIA (Santa Clara, CA)
- …closure of Nvidia's GPUs, CPUs, DPUs and SoCs at block level, cluster level, and/or full chip level. + Work with PD, DFX, Clocks, and other teams in coming up with ... experience in Timing and STA + Hands-on experience in full- chip /sub- chip Static Timing Analysis (STA) and timing...autonomous, we want to hear from you. Your base salary will be determined based on your location, experience,… more
- NVIDIA (Santa Clara, CA)
- …in a few of the following areas: + HSIOs like PCIE or chip -to- chip interconnects including understanding of process/temp/voltage sensitivity on BER. + ... Identifying full chip data paths for HSIO saturation and working with...we want to hear from you. #LI-Hybrid Your base salary will be determined based on your location, experience,… more
- NVIDIA (Santa Clara, CA)
- …feedback. + Driving new feature initiatives across multiple business units, converting chip and board level dI/dt analysis/mitigation techniques and board PDN design ... to enable product shipment. + Work alongside system architects, chip and board designers, software/firmware engineers, HW/SW applications engineering,… more
- NVIDIA (Santa Clara, CA)
- …needed for NVIDIA chips. + Participate in developing flow and tool methodologies for chip floorplan, power and clock distribution, chip assembly and P&R, timing ... in Physical Design Engineering + Familiar with aspects of chip design including Floor planning, Clock and Power distribution,...autonomous, we want to hear from you. Your base salary will be determined based on your location, experience,… more
- NVIDIA (Santa Clara, CA)
- …power and noise analysis and back-end verification across multiple projects along with chip floorplan, power and clock distribution, chip assembly. + Extensive ... in Physical Design Engineering + Familiar with aspects of chip design including Floor planning, Clock and Power distribution,...autonomous, we want to hear from you. Your base salary will be determined based on your location, experience,… more
- NVIDIA (Santa Clara, CA)
- …high production-quality standards. This software engineering role involves developing high-level chip models, test APIs and trace generation workflows, and analysis ... + Improve the daily workflows of the world's top chip modelers and designers to help produce the next...technologies to help provide data insights. #LI-Hybrid Your base salary will be determined based on your location, experience,… more
- ABM Industries (Santa Monica, CA)
- …| (Programa de Beneficios de ABM) **Pay: $19.50/HR** **The pay listed is the salary range for this position. Any specific offer will vary based on the successful ... With over $8 billion in annual revenue and a blue- chip client base, ABM delivers innovative technologies and sustainable...With over $8 billion in annual revenue and a blue- chip client base, ABM delivers innovative technologies and sustainable… more
- Broadcom (San Jose, CA)
- …use of various EDA offerings from major EDA suppliers in semiconductor industry for IP and chip design + Working knowledge of IP and chip design flow for analog ... for validation before product manufacturing + Provide design rule reviews for IP, chip , and package designs for product release sign off + Provide support for… more