• Staff R&D Engineer Adv Tech Dev

    Broadcom (San Jose, CA)
    …use of various EDA offerings from major EDA suppliers in semiconductor industry for IP and chip design + Working knowledge of IP and chip design flow for analog ... for validation before product manufacturing + Provide design rule reviews for IP, chip , and package designs for product release sign off + Provide support for… more
    Broadcom (07/11/25)
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  • ASIC Engineering Technical Leader - SDC

    Cisco (San Jose, CA)
    …design levels. You will collaborate with Front-end and Back-end teams to understand chip architecture and guide them in refining design and timing constraints for ... of ASIC or related experience. + Experience with block/full chip SDC development in functional and test modes. +...work in the US and/or Canada:** When available, the salary range posted for this position reflects the projected… more
    Cisco (08/14/25)
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  • Software Engineer II - (E2)

    Applied Materials (Santa Clara, CA)
    …global leader in materials engineering solutions used to produce virtually every new chip and advanced display in the world. We design, build and service ... technology, join us to Make Possible(R) a Better Future. **What We Offer** Salary : $124,000.00 - $170,500.00 Location: Santa Clara,CA At Applied, we prioritize the… more
    Applied Materials (08/13/25)
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  • Senior Optical Test and Automation Engineer,…

    Google (Sunnyvale, CA)
    …with an advanced degree. + 4 years of experience working on wafer-level or chip -level probe testing or optical lab automation and scripting (eg, Python, MATLAB, or ... leading AI platform for bringing Gemini models to enterprise customers. The US base salary range for this full-time position is $147,000-$216,000 + bonus + equity +… more
    Google (08/13/25)
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  • Display Silicon Architect

    Google (Mountain View, CA)
    …practical experience. + 6 years of experience working in display-related silicon chip design, with digital, analog, and IC designs. + Experience with product ... **Preferred qualifications:** + Experience architecting CMOS backplanes for microdisplays, developing chip level specs and developing new products. + Experience with… more
    Google (08/12/25)
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  • Director, Process Engineer

    Applied Materials (Santa Clara, CA)
    …global leader in materials engineering solutions used to produce virtually every new chip and advanced display in the world. We design, build and service ... to Make Possible(R) a Better Future. **What We Offer** Salary : $189,000.00 - $260,000.00 Location: Santa Clara,CA At Applied,...materials engineering solutions used to produce virtually every new chip and advanced display in the world. We design,… more
    Applied Materials (08/09/25)
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  • Staff Software Engineer, TPU Performance,…

    Google (Sunnyvale, CA)
    …features and Software optimization techniques and drive the next generation TPU Chip and system architecture. The ML, Systems, & Cloud AI (MSCA) organization ... bringing Gemini models to enterprise customers. The US base salary range for this full-time position is $197,000-$291,000 +...software optimization techniques and drive the next generation TPU Chip and system architecture. + Work with teams across… more
    Google (08/08/25)
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  • Senior Product Manager, Recommendation Models

    Google (Mountain View, CA)
    …aspect of the work will also be to define and enhance the AI chip strategy, enabling the necessary efficiency for continuous training and serving of these advanced ... and we do it all together. The US base salary range for this full-time position is $183,000-$271,000 +...and driving the complete experience. + Develop YouTube's AI Chip strategy for recommendation models, focusing on resource allocation,… more
    Google (08/08/25)
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  • Silicon Engineer, Digital Design, Quantum AI

    Google (Mountain View, CA)
    …Knowledge in at least one of these areas: CPU Processor Cores, Buses/Fabric/Network-on-a- Chip , Debug/Trace, Interrupts, or Clocks/Reset. Be part of a team that ... capabilities of quantum computing and enabling meaningful applications. The US base salary range for this full-time position is $156,000-$229,000 + bonus + equity… more
    Google (08/08/25)
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  • Physical Design Flow and Methodology Engineer

    Google (Sunnyvale, CA)
    …AI/ML-driven systems. In this role, you will be a part of the chip implementation team developing flows and methodologies for workflow automation, data management, ... bringing Gemini models to enterprise customers. The US base salary range for this full-time position is $156,000-$229,000 +...CAD tool workflows for ASIC development. + Collaborate with chip design teams to implement tools and methodologies for… more
    Google (08/08/25)
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