- NVIDIA (Santa Clara, CA)
- …user data for our CPU/GPU clusters, application observability, model training, inference, chip development, system and application health and other areas. What ... you will be doing: + Manage and build up a team of fullstack engineers and data pipeline architects that deliver scalable data services and infrastructure that powers the Data Platform and dependent applications. + Work with end customers across the company to… more
- Amazon (Cupertino, CA)
- …with architects, design teams, software engineers to deliver the next generation ML chip . In this position, you will have the opportunity to be responsible for ... stack -Define boot-up initiatization, reset flow, training sequence -Perform system -level debug and root-cause analysis through bring-up, characterization, validation… more
- Broadcom (San Jose, CA)
- …the industry. In this role you will work on designing multiple high speed system designs involving LPDDR6, GDDR7, HBM4 etc and advanced technologies like 2.5D/3D in ... etc engineers to implement & integrate the developed IP 3. Ability to complete chip bring-up and lab measurement of designed elements 4. Ability to understand the… more
- Cisco (San Jose, CA)
- …developing software in Python for hardware/ASIC testing. + Prior experience in chip -level, board-level and system -level hardware architecture. + Prior experience ... in Linux environment. **Preferred Qualifications:** + Prior experience with network processor and PHY testing. + High speed SERDES hardware or software experience. + Prior experience working with ATE teams and supporting silicon testing in production. + ASIC… more
- Amazon (Cupertino, CA)
- …of different subsystems in the SoC. If you have a solid background in embedded software, system development or chip design, come join us! About the team Why AWS ... Amazon Web Services (AWS) is the world's most comprehensive and broadly adopted cloud platform. We pioneered cloud computing and never stopped innovating - that's why customers from the most successful startups to Global 500 companies trust our robust suite of… more
- Amazon (Cupertino, CA)
- …with architects, design teams, software engineers to deliver the next generation ML chip . In this position, you will have the opportunity to be responsible for ... Define boot-up initiatization, reset flow, training sequence - Perform system -level debug and root-cause analysis through bring-up, characterization, validation and… more
- NVIDIA (Santa Clara, CA)
- …applications + Evaluate PPA (performance, power, area) for hardware features and system level architectural trade-offs. Develop high level simulators in C++/Python + ... Learning ASIC architecture for distributed training and/or inference spanning multi- chip /multi-node + Experience with performance modeling, architecture simulation, profiling,… more
- Arrow Electronics (San Jose, CA)
- …with 5+ years of ASIC or related experience. + Experience with **block/full chip SDC development** in functional and test modes. + Experience in **Static Timing ... async boundaries) + Experience with synthesis tools (eg. Synopsys DC/DCG/FC), Verilog/ System Verilog programming + Experience with constraint analyzer tools such as… more
- Teledyne (Milpitas, CA)
- …code and ensure timing closure + Verify proper operation of your circuit via system level test with test hardware + Work with the verification engineer to validate ... your circuit in a whole chip simulation environment + Work with customer support to reproduce and fix issues found in the field + Reproduce customer environment to… more
- Power Integrations (San Jose, CA)
- …Failure Analysis Engineer will be responsible for carrying out power supply and system level analysis to determine the root cause of product application failures. + ... semiconductor operational characteristics and the ability to apply fault isolation techniques at chip level as well as board level. + Mandarin spoken language skills… more