• Sr. ASIC Modem Design Engineer, Project Kuiper

    Amazon (Sunnyvale, CA)
    …define modems, high-speed interfaces, embedded processors, and DSP solutions in latest CMOS generation technologies. In this role you will: . Implement wireless ... system architecture in silicon from system specification to chip specification to RTL to optimizing timing / power to chip level validation. . Develop solutions optimizing customer experience (throughput, latency, and availability) while meeting power and cost… more
    Amazon (07/12/25)
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  • Sr. Analog Circuit Design Engineer

    Amazon (San Diego, CA)
    …Design & optimize the above circuit blocks in deeply scaled CMOS /SiGe/SOI processes. Perform circuit layout, parasitic extraction, and run extracted simulation ... across various corners to make sure designs are robust and can be taken to volume production. Collaborate with the digital design team to define analog/digital boundary requirements for circuit calibration. Specify bench and production test plans for your… more
    Amazon (07/10/25)
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  • Staff RFIC Design Engineer

    Skyworks (Irvine, CA)
    …and RF switches for wireless applications using SOI, SiGe or CMOS technologies. + Develop circuit architecture, design, layout floor-planning, layout supervision, ... simulation, verification, and production ramp support. + Collaborate closely with multi-discipline teams, including module, systems, PA, LNA, switch, and MCM design teams, to optimize co-design performance and resolve any performance/circuit design issues. +… more
    Skyworks (07/09/25)
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  • Chief Technology Officer

    ZymoChem (San Leandro, CA)
    …of new products. + Experience partnering with business development leadership, CMOs , and external strategic partners. + Knowledge of technological trends to ... build strategy and conduct technological analysis and research. + Excellent communicator, able to communicate technical information and negotiate business partnerships with a variety of stakeholders. + Comfortable working in a very dynamic start-up or small… more
    ZymoChem (07/09/25)
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  • Senior ASIC Design Engineer, Project Kuiper

    Amazon (San Diego, CA)
    …define modems, high-speed interfaces, embedded processors, and DSP solutions in latest CMOS generation technologies. In this role you will: . Implement wireless ... system architecture in silicon from system specification to chip specification to RTL to optimizing timing / power to chip level validation . Develop solutions optimizing customer experience (throughput, latency, and availability) while meeting power and cost… more
    Amazon (07/09/25)
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  • Senior Failure Analysis Engineer (Automotive)

    Power Integrations (San Jose, CA)
    …to interpret system level schematics, the IC level schematics, and IC layout of CMOS and bipolar devices is required. Preferences will be given to candidates who ... have a thorough understanding of analog, mixed-signal, or power semiconductor operational characteristics and the ability to apply fault isolation techniques at chip level as well as PCB at power supply system level. Education: + Must have BS degree in… more
    Power Integrations (07/08/25)
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  • Focal Plane Engineer

    Teledyne (Camarillo, CA)
    …or more of following areas: Thin-film semiconductor materials, photodetector arrays, CMOS readout integrated circuit, flip-chip hybridization, and focal plane array ... assembly and testing. + Excellent written and verbal communication skills and the ability to effectively communicate at any level of audience. + Experience in technical project management, risk assessment, statistical process control and design of experiments.… more
    Teledyne (07/04/25)
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  • Sr. Principal Analog IC Designer

    Cadence Design Systems, Inc. (San Jose, CA)
    …+ Candidate's background should include a minimum of 7 years of experience in CMOS SerDes or high-speed I/O IC design and development + Working knowledge of a ... set of common SerDes standards and their electrical requirements is a plus + Must have a thorough understanding of jitter and signal equalization techniques + Proficient design experience in most of the following SerDes circuit blocks: Driver; Receiver;… more
    Cadence Design Systems, Inc. (07/04/25)
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  • Sr Principal ROIC Semiconductor Yield Engineer

    RTX Corporation (Goleta, CA)
    …**Qualifications We Prefer:** + Experience working in a semiconductor fab processing CMOS imaging sensor ROIC's as a process engineer, process integration engineer, ... or yield engineer + Experience working with database infrastructures and performing data analysis including JMP, Minitab, Tableau (or other related software). + Experience leading teams through yield improvement in a semiconductor manufacturing environment to… more
    RTX Corporation (07/03/25)
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  • Senior ASIC Synthesis Engineer

    NVIDIA (Santa Clara, CA)
    …advanced technology team to optimize design tradeoffs and methodology on next generation CMOS technology. We are looking for a Senior ASIC Synthesis Engineer to join ... our dynamic and growing team! If you are problem solver and highly motivated individual searching for a collaborative and exciting role, join us today. We encourage applicants with a history of proven success working in a multicultural and diverse environment.… more
    NVIDIA (07/01/25)
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