- Meta (Sunnyvale, CA)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design ... Chip (SoC) for data center applications. As a Design Verification Engineer , you will be part of...Preferred Qualifications: 14. Experience in development of UVM based verification environments from scratch 15. Experience verifying GPU/ CPU… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design ... On Chip (SoC) for data center applications.As a Design Verification Engineer , you will be part of...RoCE, DDR, HBM, Ethernet 17. Experience with micro-architectural performance verification 18. Experience verifying GPU/ CPU designs 19.… more
- Meta (Sacramento, CA)
- **Summary:** Meta is hiring ASIC Formal Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Formal ... Chip (SoC) for data center applications. As a Formal Verification Engineer , you will be part of...verification of complex compute blocks such as DSP, CPU , GPU or HW accelerators 20. Experience with complex… more
- NVIDIA (Santa Clara, CA)
- As a Formal Verification Engineer at NVIDIA, you will work in the formal verification team for the industry's leading chips. We are looking for outstanding ... candidates with knowledge of formal methods. The engineer will own the task of formal ...verification techniques. + Strong knowledge of architectures of CPU /GPU designs and digital logic. + Understanding of abstraction… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is looking for Formal Verification Engineer to help verify the design and implementation of industry's leading CPUs and other High Performance Computing ... Solutions. As a Formal Verification Engineer , you will play a key...years of experience in CS/CE/EE/Mathematics. + Solid understanding of GPU/ CPU architectures and designs. + Strong analytical skills to… more
- Broadcom (San Jose, CA)
- …team responsible for state-of-the-art subsystem development to meet customer requirements. The engineer will be responsible for a variety of advanced verification ... tasks such as: verification environment development using modern verification techniques (System Verilog and UVM); designing verification components such as… more
- Meta (Sunnyvale, CA)
- …from transistors, through architecture, firmware, and algorithms. **Required Skills:** Design Verification Engineer Responsibilities: 1. Define and implement ... test benches for block, IP, sub-system, and SoC level verification 2. Develop functional tests based on verification...verifying ARM/RISC-V based sub-systems and SoCs 14. Experience verifying CPU /GPU designs 15. Experience in one or more of… more
- Amazon (San Diego, CA)
- …technologies. In this role you will: . Implement a state of the art verification environment to facilitate testing of the RTL against reference Matlab/C models . ... . Write tests in C/C++ to execute on embedded CPU . Develop tests for FPGA and emulation platforms...tests for FPGA and emulation platforms . Run formal verification of complex blocks to ensure functional correctness .… more
- Amazon (Cupertino, CA)
- …and Japan, and customers across all industries. We are seeking experienced Design Verification Engineers to build the next generation of our cloud server chips. Our ... or CS or CE. - 8+ years of design verification experience using System Verilog and UVM - 8+...coherency and synchronization techniques - Experience with verifying complex CPU , GPU, or ML accelerator designs Amazon is an… more
- NVIDIA (Santa Clara, CA)
- …high-performance, software-defined, cloud-native Radio Access Network functions over NVIDIA CPU /GPU/DPU based systems. We are seeking a self-motivated senior ... performance engineer to drive performance and scalability of our platform....6G networks, you will be responsible for: + Optimizing CPU , GPU and NIC sub-systems for predictable low-latency and… more
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