• Physical Design , Sr Principal Application…

    Cadence Design Systems, Inc. (San Jose, CA)
    …Principal Application Engineering (AE) - a blend of pre-sales, post-sales and design convergence in the netlist-GDS product space focusing on digital implementation ... P&R, and Signoff to meet/exceed their PPA targets, achieve faster design closure, and turn design concepts into reality. You will also work directly with the… more
    Cadence Design Systems, Inc. (05/28/25)
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  • Senior Embedded Software Engineer , CSP…

    Google (Mountain View, CA)
    …hardware designs, prototype Software-based Hardware-mocks, and engage in Hardware or Software co- design efforts to engineer firmware solutions that support all ... software products, and 1 year of experience with software design and architecture. + 3 years of experience with...on and is growing every day. As a software engineer , you will work on a specific project critical… more
    Google (08/25/25)
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  • Staff Silicon Engineer , IP Design

    Google (Mountain View, CA)
    …development (eg, research, algorithm development, digital and physical design , implementation, verification, bring-up and post-silicon maintenance). + Experience ... in ASIC hardware architecture and silicon design . + Experience in coding with C or C++,...+ Experience across the full Application-Specific Integrated Circuit (ASIC) design flow, including UVM/OVM verification, synthesis, and timing closure.… more
    Google (08/25/25)
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  • Principal Product Engineer (PCB…

    Cadence Design Systems, Inc. (San Jose, CA)
    …have experience with Allegro PCB Editor with knowledge of high speed design rules and routing strategies, High Density Interconnect (HDI) and basic knowledge ... of Rigid-Flex Design . Responsibilities: + Running design benchmarks and developing and reviewing flows and solutions + Interacting with R&D teams to define… more
    Cadence Design Systems, Inc. (08/08/25)
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  • R&D Engineer IC Design

    Broadcom (Irvine, CA)
    …not limited to, the following job duties: + Work as part of a physical design team implementing chips from netlist to GDSii with good understanding of the technology ... elements as well as design flow in all stages. + Responsible for floorplanning, design partition and block pin assignment. + Perform blocks PnR, timing closure,… more
    Broadcom (07/21/25)
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  • Sr. Process Engineer - Semiconductor…

    Skyworks (Irvine, CA)
    …Nearest Major Market:Irvine CaliforniaNearest Secondary Market:Los Angeles Job Segment: Mechanical Engineer , Package Design , Night, Process Engineer , ... Sr. Process Engineer - Semiconductor Packaging (Night Shift) Apply now...Skyworks is looking for a full time Semiconductor Packaging Engineer to work in our Newport Beach/Irvine, California Prototype… more
    Skyworks (08/01/25)
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  • Lead Application Engineer - Physical…

    Cadence Design Systems, Inc. (San Jose, CA)
    …with customers doing challenging designs at advanced nodes and help them with design implementation and signoff. Will serve as the technical expert on Cadence tools ... as well as a valued consultant on design and implementation issues. Will script up solutions or...modern life depends on. We are a global electronic design automation company, providing software, hardware, and intellectual property… more
    Cadence Design Systems, Inc. (08/22/25)
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  • R&D Engineer IC Design

    Broadcom (San Jose, CA)
    …3nm and beyond Job Responsibilities: In this position you are responsible for 1. Design , RTL coding, and IP integration of key components like Digital Delay Lines, ... and verify. Job Requirements: 1. Excellent knowledge of Digital design is a must and it will be a...good understanding of Analog circuits or basic digital circuit design 2. Experience with implementing Transceivers, Clocking elements like… more
    Broadcom (07/03/25)
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  • ASIC Engineer , IP Design , Silicon

    Google (Mountain View, CA)
    …or equivalent practical experience. + 8 years of experience with RTL design using Verilog/System Verilog and microarchitecture. + Experience with a scripting ... on computer architecture. + 10 years of industry experience with IP design . + Experience with methodologies for low power estimation, timing closure, synthesis.… more
    Google (08/24/25)
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  • Principal Engineer , VLSI Design

    SanDisk (Milpitas, CA)
    …more years of relevant experience. + Knowledge and/or experience in non-volatile memory design (NAND flash memory cell operation in particular) is a big advantage + ... A strong design & device background and experience with evaluating new...experience with evaluating new process technologies for use in design is preferred. + The ideal candidate must have… more
    SanDisk (08/16/25)
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