- NVIDIA (Santa Clara, CA)
- …human inventiveness and intelligence. We are now looking for a motivated ASIC Timing Engineer to join our dynamic and growing team. If you want to challenge yourself ... full chip level. + Help in driving frontend and backend implementation including synthesis, equivalence checking, floor-planning, timing constraints, timing and… more
- NVIDIA (Santa Clara, CA)
- …human inventiveness and intelligence. We are now looking for a motivated ASIC Timing Engineer to join our dynamic and growing team. If you want to challenge yourself ... to amplify human inventiveness and intelligence. What you'll be doing: + Drive Physical Design and timing analysis and closure of NVIDIA's GPUs, CPUs, DPUs and SoCs… more
- NVIDIA (Santa Clara, CA)
- …inventiveness and intelligence. We are now looking for a motivated Senior ASIC Physical Design Engineer , Netlisting to join our dynamic and growing team. If you ... What you'll be doing: + You will drive physical design of high-frequency and low-power CPUs, GPUs, SoCs at...timing constraints generation and management, and ECO generation and implementation . What we need to see: + BS (or… more
- NVIDIA (Santa Clara, CA)
- …silicon validation, debugging, characterization and bring up. What you'll be doing: + Lead design and implementation of high speed interface circuit + Design ... of our Mixed Signal team, you will lead the design of CMOS high-speed interface circuits and mixed-signal circuits.... in deep submicron CMOS + Take designs through implementation and productization + Work with multi-functional teams What… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is seeking a hardworking Senior ASIC Design Verification Engineer to help drive sign-off strategies for world's leading GPUs and SoCs. This position ... to meet the unique demands of custom designed IPs. + Engage in design specification development by participating in discussions on architecture, intent, and … more
- Broadcom (San Jose, CA)
- …and technically strong engineer to join our team. Job Description: Layout design of digital high-performance blocks Timing closure of the blocks with best PPA ... The Central Engineering Team is responsible for standard cell development and custom design solutions that power cutting-edge AI compute cores and CPUs. We are… more
- Tarana Wireless (Milpitas, CA)
- …tools (eg, Python) Bonus Points For: + Experience with wireless PHY layer design (eg, modulation/demodulation) + Implementation of DSP and arithmetic algorithms ... of the brightest minds in the industry. If you're passionate about digital design , solving complex problems, and building products that make a global difference,… more
- NVIDIA (Santa Clara, CA)
- As a member of our CPU Cache Coherent Interconnects Design Team, you will be responsible for the physical design of CPU on-chip interconnect network and ... last-level caches, working on implementation , synthesis and timing closure while collaborating closely with...and timing closure while collaborating closely with the logic design team on micro-architecture definition and feasibility. This position… more
- Amazon (Cupertino, CA)
- Description What you will do: As a member of the AWS Board Core Design & Services team you will own next-generation server components. You will have demonstrated ... will interact with an interdisciplinary team of engineers to design , develop, validate, and launch at large scale. You'll...and fun team. You will have ownership for the implementation of your work. A day in the life… more
- Jacobs (Los Angeles, CA)
- …to the success of these projects. We're looking for a skilled Project Engineer to manage and supervise subcontract and material resources in relation to construction ... Engineers to ensure technical documentation is up to date, including submittals, RFIs, design changes, and record documents. Here's what you will be doing: * Ensure… more