• Physical Design Flow and Methodology…

    Google (Sunnyvale, CA)
    …Learn more aboutbenefits at Google (https://careers.google.com/benefits/) . **Responsibilities** + Architect and implement next generation Physical Design EDA ... Physical Design Flow and Methodology Engineer + _link_ Copy...from developing our latest TPUs to running a global network , while driving towards shaping the future of hyperscale… more
    Google (09/28/25)
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  • Design Manager

    AECOM (Los Angeles, CA)
    …to deliver a better world. Join us. **Job Description** **AECOM** is seeking a ** Design Manager** to be based in **Los Angeles, CA.** + Oversees the building ... design process to ensure compliance with Client's standards and...with the Division of State Architects (DSA). + Registered Architect or Professional Engineer in the State of California.… more
    AECOM (09/20/25)
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  • Senior Analog/mixed-signal IC Design…

    Cisco (San Jose, CA)
    …including digital/DSP design , system design , package design , and module design . **Your Impact** + You will architect , design , layout, measure and ... Senior Analog/mixed-signal IC Design Engineer - Acacia Apply (https://jobs.cisco.com/jobs/Login?projectId=1443040) + Location:San...and create meaningful solutions. Add to that our worldwide network of doers and experts, and you'll see that… more
    Cisco (08/23/25)
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  • Design Manager

    AECOM (Los Angeles, CA)
    …a better world. Join us. **Job Description** **AECOM** is seeking a highly skilled ** Design Manager** to be based in **Los Angeles, CA.** + Oversees building ... design process to ensure compliance with client standards and...Certified + A valid Certificate of Registration as an Architect by the California State Architectural Board or Professional… more
    AECOM (09/22/25)
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  • Principal design engineer, VLSI…

    SanDisk (Milpitas, CA)
    …this could be an exciting opportunity for you. ESSENTIAL DUTIES AND RESPONSIBILITIES: + Architect and design circuits at transistor level and gate level for ... World Economic Forum as part of the Global Lighthouse Network for advanced 4IR innovations. These facilities were also...3D NAND flash memory focusing on high-speed datapath circuit design and page buffers. + Perform block level and… more
    SanDisk (07/17/25)
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  • Senior Staff Project Engineer Tactical Data Links

    General Atomics (Poway, CA)
    …Expertise: leverages fighter-to-fighter tactical data link expertise to design and architect UCAV air dominance network topologies, network management, ... and digital data Interoperability. + Mission Architect : Lead design , drive selection of hardware & software, integrate and test communications networks across a… more
    General Atomics (08/20/25)
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  • FPGA Design Engineer

    Actalent (Chatsworth, CA)
    …for aerospace, defense, and industrial applications. Key Responsibilities * FPGA Architecture & Design * Lead the design and development of FPGA-based subsystems ... using VHDL/Verilog for high-reliability embedded platforms. * Architect scalable and modular FPGA designs for real-time processing, signal acquisition, and control… more
    Actalent (10/01/25)
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  • Design Phase Manager (Construction)

    AECOM (Oakland, CA)
    …deliver a better world. Join us. **Job Description** **AECOM** is seeking a ** Design ** **Phase Manager** **(Construction)** to be based in **OAKLAND, CA** * Manages ... + Prior experience managing projects through the Division of the State Architect (DSA) approval process + Experience with multiple construction delivery methods… more
    AECOM (09/22/25)
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  • MTS Circuit Design Engineer, HSIO

    Micron Technology, Inc. (Folsom, CA)
    …global footprint, in a multiple projects-based environment. **What's Encouraged Daily:** + Architect high speed clocking network + Evaluate Phase Lock Loop ... ever. We are searching for a High Speed I/O Design engineer at our Micron Technology's HBM Team in...HBM Team in Folsom, California. As a high speed Design engineer, you will be working for intensive applications… more
    Micron Technology, Inc. (08/22/25)
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  • Senior Design Verification Engineer

    quadric.io, Inc (Burlingame, CA)
    …(GPNPU) architecture. Quadric's co-optimized software and hardware is targeted to run neural network (NN) inference workloads in a wide variety of edge and endpoint ... or autonomous vehicle systems. Unlike other NPUs or neural network accelerators in the industry today that can only...good people you'll want to spend time with. + Architect , and develop from scratch, a novel set of… more
    quadric.io, Inc (09/08/25)
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