• Senior Mixed Signal Design Verification…

    Capgemini (Santa Clara, CA)
    **About the job you're considering** We're looking for a collaborative Senior Mixed-Signal Design Verification Engineer to help shape the future of SoC ... and efficient validation. + Create detailed test plans and coverage metrics from design specifications, and execute both block- and chip -level tests. + Automate… more
    Capgemini (07/19/25)
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  • Physical Design Methodology Engineer

    quadric.io, Inc (Burlingame, CA)
    …+ Proficiency in chip front-end and back-end implementation tools such as Design Compiler, PrimeTime, ICC2 & Fusion Compiler. + Experience with 16nm and below ... variety of edge and endpoint devices, ranging from battery operated smart-sensor systems to high-performance automotive or autonomous vehicle systems . Unlike… more
    quadric.io, Inc (06/09/25)
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  • Sr. Physical Design Methodology…

    Amazon (Cupertino, CA)
    …in the US, Europe, Singapore, and Japan, and customers across all industries. Custom SoCs ( System on Chip ) live at the heart of AWS Machine Learning servers. As ... and rapid integration of emergent technologies. We're looking for an ASIC Physical Design Methodology Engineer to help us trail-blaze new technologies and… more
    Amazon (07/26/25)
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  • Sr. Physical Design Engineer

    Amazon (Cupertino, CA)
    …and rapid integration of emergent technologies. We're looking for an ASIC Physical Design Engineer to help us trail-blaze new technologies and architectures, ... and Japan, and customers across all industries. Custom SoCs ( System on Chip ) live at the heart...Machine Learning Acceleration team you'll be responsible for the design and optimization of hardware in our data centers… more
    Amazon (06/04/25)
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  • CPU Physical Design - Low Power Signoff…

    Qualcomm (San Diego, CA)
    …of experience in IC design ** . + **Experience in leading block level or chip level Physical Design , STA and PDN activities** . + Work independently in the ... smarter, connected future for all. As a Qualcomm CPU Engineer , you will lead innovative Central Processing Unit (CPU)..., you will lead innovative Central Processing Unit (CPU) design efforts that have a critical impact on industries… more
    Qualcomm (06/05/25)
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  • ASIC Engineer , Design Verification

    Meta (Sunnyvale, CA)
    …click "Apply to Job" online on this web page. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Evaluate, develop and drive next ... functional tests based on verification test plan. 6. Drive Design Verification to closure based on defined verification metrics...based verification 16. 5. ASIC development cycles 17. 6. IP/sub- system or SoC ( System On Chip more
    Meta (08/01/25)
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  • FPGA Design /Verification Engineer

    Butler America (Sunnyvale, CA)
    …developing, testing, and integrating digital signal processing (DSP), high speed digital design , high speed communication and system -on- chip (SOC) ... FPGA Design /Verification Engineer Location: Sunnyvale, CA Job...to improve FPGA development efforts. Cross discipline collaboration with Systems Architects, RF/Analog & Digital Circuit designers and ASIC/FPGA… more
    Butler America (08/08/25)
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  • Silicon Engineer , Design

    Google (Goleta, CA)
    …field, or equivalent practical experience. + 5 years of experience with design verification. + Experience verifying digital systems using SystemVerilog/UVM. + ... JasperGold, VC Formal, Questa Formal, or 360-DV. + Knowledge of digital architecture/logic design techniques and principles. As a Silicon Engineer , you will be… more
    Google (08/08/25)
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  • Senior Analog/mixed-signal IC Design

    Cisco (San Jose, CA)
    Senior Analog/mixed-signal IC Design Engineer - Acacia Apply (https://jobs.cisco.com/jobs/Login?projectId=1443040) + Location:San Jose, California, US + ... Our team interacts with other Acacia groups including digital/DSP design , system design , package ...lead efforts for a large block on a complex chip , mentor team members and track deliverables, participate in… more
    Cisco (08/08/25)
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  • Principal Design Engineer

    Microsoft Corporation (Mountain View, CA)
    …passionate engineers to help achieve that mission. We are looking for a **Principal Design Engineer ** to work in the dynamic Microsoft Artificial Intelligence ... System on Chip (AISoC) Silicon team. Microsoft's...Own and drive the development of microarchitecture and RTL design , coding, and verification of complex IP blocks, including:… more
    Microsoft Corporation (07/25/25)
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