- Broadcom (San Jose, CA)
- …various EDA offerings from major EDA suppliers in semiconductor industry for IP and chip design + The ideal candidate will have wide-ranging experience, with a ... already have a Candidate Account, please Sign-In before you apply.** **Job Description:** ** Design Automation Engineer ** This position is part of a team tasked… more
- Qualcomm (Santa Clara, CA)
- …Engineering Group, Engineering Group > CPU Engineering **General Summary:** As a Physical Design Clock Engineer , you will work with microarchitecture, RTL ... MS in Electrical Engineering; 8+ years of practical experience. + Skilled in chip physical design , standard cell optimizations, and clock construction. + Defined… more
- NVIDIA (Santa Clara, CA)
- …characterization needs and test requirements for Productization. + Work alongside system architects, chip and board designers, software/firmware engineers, HW/SW ... multifaceted, multi-functional team at NVIDIA. We sit at the crossroads of design , architecture, marketing, and productization. Our involvement begins at the arch… more
- Qualcomm (San Diego, CA)
- …develop and drive CPU timing closure for Oryon CPU Cores. As a CPU Physical Design Timing Engineer , you will work with microarchitecture and RTL design ... correlation. + Find out the root cause of timing miscorrelation at different design levels in functional and test mode, propose solutions. + Evaluate multiple timing… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is looking for a Senior Design Engineer for our Coherent High Speed Interconnect team! For two decades, NVIDIA has pioneered visual computing, the art and ... - the field has grown to encompass video games, movie production, product design , medical diagnosis, and scientific research! Today, we stand at the beginning of… more
- Qualcomm (Santa Clara, CA)
- …in physical design , integration, and verification of large processor and system -on- chip (SoC) designs. + Extensive knowledge of low power and ... for the needs of the server product. As a CPU Floorplan and Integration Engineer , you will work with microarchitecture, RTL design and physical design… more
- Meta (Sacramento, CA)
- …/ UVM 8. 2. Constraint Random Testbench 9. 3. IP/SoC ( System On Chip ) Verification 10. 4. Debugging design 11. 5. Functional Coverage 12. 6. Automation ... "Apply to Job" online on this web page. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and implement IP/SoC verification… more
- Applied Materials (Santa Clara, CA)
- …virtually every new chip and advanced display in the world. We design , build and service cutting-edge equipment that helps our customers manufacture display and ... packaging materials. Support the Product Life Cycle (PLC) process by defining Design For Transportability (DFT) requirements and influencing product design .… more
- Cisco (San Jose, CA)
- Senior ASIC Design Engineer Apply (https://jobs.cisco.com/jobs/Login?projectId=1431806) + Location:San Jose, California, US + Area of InterestEngineer - Hardware ... meet timing, performance, and power requirements. + Contribute to full chip integration and timing methodology/analysis. + Develop and analyze functional coverage.… more
- Teledyne (Milpitas, CA)
- …with the verification engineer to validate your circuit in a whole chip simulation environment + Work with customer support to reproduce and fix issues found ... factory automation, air and water quality environmental monitoring, electronics design and development, oceanographic research, deepwater oil and gas exploration… more