- Microsoft Corporation (Mountain View, CA)
- …LINT + CDC (Clock Domain Crossing) + DRC ( Design Rule Checking) + Develop basic test benches. + Support verification, DFT ( Design for Test ), and ... achieve that mission. We are looking for a **Principal Design Engineer ** to work in the dynamic...+ Analog mixed-signal designers + Verification engineers + Physical design and DFT teams + Other front-end… more
- Cisco (San Jose, CA)
- …product health dashboards. + Hands-on experience with Design for Manufacturing (DFM) or Design for Test ( DFT ), and test planning for high-complexity ... System Quality & Manufacturing Test Engineer Apply (https://jobs.cisco.com/jobs/Login?projectId=1447421) + Location:San Jose, California, US + Alternate… more
- Amazon (San Diego, CA)
- …Development team on test coverage, fault isolation capability, PCBA failure trends, and DFT ( Design for Test ) recommendations. * Run small teams to ... unserved and underserved communities around the world. As a PCBA Manufacturing Test Engineer , you will be responsible for deployment, qualification, continuous… more
- Cisco (San Jose, CA)
- …and manage the OSAT production test activities. **Your Impact** You will be a Test Engineer in Silicon Operations focusing on the ATE test bring-up. You ... Sr. Test Development Engineer Apply (https://jobs.cisco.com/jobs/Login?projectId=1448472) +...design teams in the Central Hardware Group, peer Test Engineers in Silicon Operations, and with Cisco Systems… more
- Applied Materials (Santa Clara, CA)
- …packaging materials. Support the Product Life Cycle (PLC) process by defining Design For Transportability ( DFT ) requirements and influencing product design ... new chip and advanced display in the world. We design , build and service cutting-edge equipment that helps our...of packaging suppliers and related processes and procedures. Develop test plans and perform laboratory testing on products, packages,… more
- SanDisk (Milpitas, CA)
- … and verification in Verilog, RTL linting, clock domain crossing (CDC) analysis, design integration, synthesis, DFT , timing analysis and closure + Balance ... of innovation. We are looking for an experienced Principal Engineer to lead and deliver projects for our Memory...integration, chip lead, and full product life cycle (requirements, design , implementation, test ) of Logic design… more
- SanDisk (Milpitas, CA)
- … and verification in Verilog, RTL linting, clock domain crossing (CDC) analysis, design integration, synthesis, DFT , timing analysis and closure + Balance ... of innovation. We are looking for an experienced Staff Engineer to lead and deliver projects for our Memory...integration, chip lead, and full product life cycle (requirements, design , implementation, test ) of Logic design… more
- SpaceX (Sunnyvale, CA)
- Sr. SOC/ASIC Physical Design Engineer (Silicon Engineering) Sunnyvale, CA Apply SpaceX was founded under the belief that a future where humanity is out exploring ... of enabling human life on Mars. SR. SOC/ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're...fast, reliable internet to millions of users worldwide. We design , build, test , and operate all parts… more
- NVIDIA (Santa Clara, CA)
- The Advanced Technology Group (ATG) at NVIDIA is an organization of process, CAD, design , and test engineers that works closely with foundry partners and ... Product Guidance: Collaborate with architecture, RTL, place & route, DFT , CAD, circuit design , yield operations, and...SRAM macros and test structures for early test vehicles on advanced processes, focusing on design… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is looking for an ASIC Design Engineer to join our Memory Subsystem Team! As an ASIC Design engineer at NVIDIA, you'll join a group of ... BS (or equivalent experience) in Electrical Engineering or Computer Engineer or related degree required, advanced degrees (MS, PhD)...plus. + Experience with all stages in the ASIC design flow including emulation, prototyping, DFT , timing… more
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