- Meta (Sunnyvale, CA)
- … design **Preferred Qualifications:** Preferred Qualifications: 13. Experience in DFT /Testability requirement definition and understanding of test program ... **Summary:** We are looking for a Digital Design Engineer to support our Reality Labs Silicon AI Research team. We build research silicon to demonstrate and… more
- Cisco (San Jose, CA)
- ASIC Design Engineer - Design & Timing... team who oversees fullchip SDCs and works with physical design and DFT teams to close fullchip timing ... of what's possible! **Your Impact** You are a diligent Design /SDC Engineer with strong analytical skills and...Experience with block/full chip SDC development in functional and test modes + Experience in Static Timing Analysis and… more
- Insight Global (San Jose, CA)
- … reporting - Collaborate with NPI engineering teams to evaluate and prioritize critical test processes during design transfer - Develop and maintain automated ... Python and ideally the Pytest framework - Familiarity with regulatory standards and design for testability ( DfT ) principles - Electrical Engineering background -… more
- NVIDIA (Santa Clara, CA)
- The Advanced Technology Group (ATG) at NVIDIA is an organization of process, CAD, design , and test engineers that works closely with foundry partners and ... Product Guidance: Collaborate with architecture, RTL, place & route, DFT , CAD, circuit design , yield operations, and...SRAM macros and test structures for early test vehicles on advanced processes, focusing on design… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is looking for an ASIC Design Engineer to join our Memory Subsystem Team! As an ASIC Design engineer at NVIDIA, you'll join a group of ... BS (or equivalent experience) in Electrical Engineering or Computer Engineer or related degree required, advanced degrees (MS, PhD)...plus. + Experience with all stages in the ASIC design flow including emulation, prototyping, DFT , timing… more
- Microsoft Corporation (Mountain View, CA)
- …architectural and micro-architectural intent + Interface with architecture, physical design (PD), design for test ( DFT ), and other teams to optimize ... clients, and augmented reality. We are looking for a ** Principal Design Engineer ** to work in the dynamic Microsoft Artificial Intelligence System on Chip… more
- Qualcomm (San Diego, CA)
- …engineering positions in our SOC and core design team. As a physical design engineer you will innovate, develop, and implement chips and cores using ... part of a team responsible for the complete Physical Design Flow and deliveries of complex, high-speed, low power...in this role involves good understanding of functional and test ( DFT ) mode constraints for place and… more
- NVIDIA (Santa Clara, CA)
- …stages of ASIC design flow including front end design and verification, DFT , timing analysis, ECO, ATE test development, post-si bringup & debug. + Good ... NVIDIA is looking for an ASIC Design Engineer to join our Global Circuits Team! In this position, you'll make a real impact in a dynamic, technology-focused… more
- Amazon (San Diego, CA)
- …underserved communities around the world. Come work at Amazon! We're hiring a Sr. RTL Design Engineer - Wireless Modem within a high performance ASIC design ... and meeting the power objectives . Create standalone verification test bench to verify the correctness of your block....C and DPI-C. . Ensure that the block meets DFT , timing and power targets by working closely with… more
- Broadcom (Irvine, CA)
- …Candidate Account, please Sign-In before you apply.** **Job Description:** **Memory Circuit Design Engineer ** We are looking for energetic and passionate memory ... design engineers to join our Central Engineering Group and...specifications, behavioral description, and timing diagrams + Specify silicon test plan and correlate silicon to simulation data +… more